posted by user: ARESxLAB || 4571 views || tracked by 6 users: [display]

ATS 2017 : Asian Test Symposium

FacebookTwitterLinkedInGoogle


Conference Series : Asian Test Symposium
 
Link: http://ares.ee.ncu.edu.tw/ats17/index.php
 
When Nov 27, 2017 - Nov 30, 2017
Where Taipei, Taiwan
Submission Deadline May 26, 2017
Notification Due Jul 31, 2017
Categories    testing   VLSI
 

Call For Papers

=========================================================
The 26th IEEE Asian Test Symposium (ATS’17)
Palais de Chine Hotel, Taipei, Taiwan
Nov. 27-30, 2017
http://ares.ee.ncu.edu.tw/ats17/index.php
=========================================================

Overview:
The Asian Test Symposium (ATS) provides an open forum for researchers and industrial practitioners from all countries of the world, especially from Asia, to exchange innovative ideas on system, board, and device testing with design, manufacturing and field consideration in mind.


Scope:
• Analog/Mixed-Signal Test
• Automatic Test Generation
• Board Test and Diagnosis
• Boundary Scan Test
• Built-In Self-Test (BIST)
• Defect-Based Test
• Delay and Performance Test
• Dependability and Functional Safety
• Design for Test (DFT)
• Diagnosis and Silicon Debug
• Economic of Test
• Failure Analysis
• Fault Modeling and Simulation
• Fault Tolerance
• GPU Test
• High-Speed I/O Test
• Low-Power IC Test
• Memory Test and Repair
• MEMS Test
• Multi-/Many-core Processor Test
• Nanotechnology Test
• On-line Test
• Power/Thermal/Reliability Issues in Test
• Reconfigurable System Test
• Reliability
• RF Test
• Hardware-oriented Security and Trust
• Self-Repair
• Sensor Test
• SiP, Stacked, 3D IC Test
• SoC Test
• Standards in Test
• Statistical Learning in Test
• Test Compression
• Test Quality
• Test Synthesis
• Validation and Verification
• Yield Analysis and Enhancement


Regular Sessions:
The ATS'17 Program Committee invites orignal, unpublished paper submissions on the above topics. Paper submissions should be complete manuscripts, not exceeding six pages (including figures, tables, and bibliography) in a standard IEEE two-column format. The submission will be considered evidence that upon acceptance the author(s) will submit a final camera-ready version of the paper for inclusion in the proceedings, and will present the paper at the symposium. The registration of at least one author is required for publication.


Key Dates:
Submission deadline: June 9, 2017(extended)
Notification of acceptance: July 31, 2017
Camera ready manuscript: August 31, 2017

http://ares.ee.ncu.edu.tw/ats17/index.php?op=overview

Related Resources

DATE 2021   Design, Automation and Test in Europe Conference
IJACEEE 2021   International Journal of Applied Control, Electrical and Electronics Engineering
ACML 2021   The 13th Asian Conference on Machine Learning
IJGCA 2021   International Journal of Grid Computing & Applications
TORACLE 2021   The 1st International Workshop on Test Oracles
CST 2021   8th International Conference on Foundations of Computer Science & Technology
VTS 2021   39th IEEE VLSI Test Symposium
MSEJ 2021   Advances in Materials Science and Engineering: An International Journal
JSS SI on Test Automation 2021   Special Issue on “Test Automation: Trends, Benefits, and Costs” - Journal of Systems and Software (Elsevier)
JEDT 2021   International Journal of Electronic Design and Test