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SILM 2020 : SILM 2020 Workshop on Software/Hardware Security


When Sep 11, 2020 - Sep 11, 2020
Where Genova
Submission Deadline May 17, 2020
Notification Due Jun 8, 2020
Final Version Due Jun 22, 2020
Categories    computer security   hardware security   hardware enclaves   side-channel attacks

Call For Papers


Call for Paper

SILM Workshop on Software/Hardware Security

September 11th, 2020
Genova, Italy


Co-located with Euro S&P 2020:
Venue: Department of Economics (DIEC) of the University of Genova, Genova, Italy

This workshop is organized as part of the SILM thematic semester funded by the
French DGA and managed by Inria for the different partners of the PEC General
Partnership Agreement.

It is becoming increasingly important to combine software and hardware aspects
in order to take into account new software attacks. For example, hardware
vulnerabilities such as Spectre or Meltdown can be exploited by purely
software attacks. Such attacks can be executed remotely and do not require
physical access to the targeted hardware platform. On the other hand, hardware
features can be used to better detect and respond to traditional software
attacks, such as memory corruption. It is therefore necessary to study in depth
the security of software/hardware interfaces, both in terms of attacks and

The purpose of the SILM workshop is to share experiences, tools, and methodologies to
handle security in software/hardware interfaces. On one hand, we need to better
assess the security guarantees provided by existing hardware architectures against
software attacks, especially attacks against micro-architecture. This can be
achieved by identifying new vulnerabilities using reverse engineering, fuzzing or
other attack approaches. On the other hand, we also need to propose new
architectures offering better resilience against software attacks. Theses
architectures should rely on hardware-based security mechanisms to protect the
software stack. One of the challenges is to formally specify and verify the security
guarantees offered by such architectures.

The goal of this second edition of the SILM workshop is to provide a forum for
researchers and practitioners from academia, industry, and government that work on
the security of software/hardware interfaces.

==== Topics of interest include, but are not limited to the following.

* Hardware reverse engineering
* Microcode security analyses
* Software side-channel attacks
* Software attacks against micro-architecture
* Hardware-based security mechanisms
* Software counter-measures against hardware vulnerabilities
* Formal methods applied to the security of software/hardware interfaces
* Hardware enclaves
* Hardware trace mechanisms for security
* OS and VM introspection

==== Important Deadlines:

- Submission (extended): May 17, 2020 - 11:59pm AoE
- Author Notification: June 8, 2020
- Camera Ready Version: June 22, 2020
- Workshop: September 11, 2020

==== Submission and publication

Authors are invited to submit papers formatted according to IEEE conference at

There are two categories of submissions:
1. Regular papers describing fully developed work and complete results
(10 pages, references included, IEEE format)
2. Short papers, position papers, industry experience reports, work-in-
progress submissions (6 pages, references included, IEEE format)

All papers should be in English and describe original work that has not been
published or submitted elsewhere. The submission category should be clearly
indicated. All submissions will be fully reviewed by members of the Program
Committee. Papers will appear in IEEE Xplore in a companion volume to the regular
EuroS&P proceedings.

Papers must be typeset in LaTeX in A4 format (not “US Letter”) using the IEEE
conference proceeding template we supply We suggest
you first compile the supplied LaTeX source as is, checking that you obtain the
same PDF as the one supplied, and then write your paper into the LaTeX template,
replacing the boilerplate text. Please do not use other IEEE templates. Failure
to adhere to the page limit and formatting requirements can be grounds for

==== Program Chairs

- Guillaume Hiet, CentraleSupélec/Inria
- Frédéric Tronel, CentraleSupélec/Inria
- Jean-Louis Lanet, Inria

==== Contact

==== Program Committee

- Pascal Cotret, ENSTA Bretagne
- Damien Couroussé, CEA
- Chris Dalton, HP Labs
- Lucas Davi, University of Duisburg-Essen
- Steven Derrien, University of Rennes 1
- Guy Gogniat, Univ. South Brittany
- Karine Heydemann, LIP6
- Guillaume Hiet, CentraleSupélec/Inria (Chair)
- Jean-Louis Lanet, Inria
- Vianney Lapôtre, Univ. South Brittany
- Cristofaro Mune, Pulse Security
- Yves-Alexis Perez, ANSSI
- Kaveh Razavi, Vrije Universiteit Amsterdam
- Jan Reineke, Saarland University
- Erven Rohou, Inria
- Simon Rokicki, ENS Rennes
- André Seznec, Inria
- Volker Stolz, HVL
- Arnaud Tisserand, CNRS
- Frédéric Tronel, CentraleSupélec/Inria
- Pierre Wilke, CentraleSupélec/Inria
- Yossi Oren, Ben-Gurion University
- Yuval Yarom, University of Adelaide and Data61

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