posted by user: vates || 1541 views || tracked by 3 users: [display]

HLDVT 2010 : IEEE International High Level Design Validation and Test Workshop


Conference Series : High Level Design Validation and Test
When Jun 10, 2010 - Jun 12, 2010
Where Anaheim, USA
Submission Deadline Mar 7, 2010
Notification Due Apr 6, 2010
Final Version Due Apr 19, 2010

Call For Papers

IEEE International High Level Design Validation and Test Workshop aims to stimulate research in test and validation methodologies for ICs and systems specified using high level descriptions, where high level refers to register-transfer, behavioral, and system level. The goal of the workshop is to provide an informal forum, bringing together designers and test and verification researchers working in validating, debugging, synthesizing, and testing designs specified using high level descriptions, in an effort to address high level design, validation, and test issues concurrently.

Related Resources

ASYNC 2018   24st IEEE International Symposium on Asynchronous Circuits and Systems
IPDPS 2018   32nd IEEE International Parallel and Distributed Processing Symposium
HPCA 2019   The 25th International Symposium on High-Performance Computer Architecture
VST 2018   2nd International Workshop on Validation, Analysis and Evolution of Software Tests
NEXTA 2018   1st IEEE Workshop on NEXt level of Test Automation
SSCI 2019   The 2019 IEEE Symposium Series on Computational Intelligence
ACIIDS 2018   10th Asian Conference on Intelligent Information and Database Systems
ICCD 2018   IEEE International Conference on Computer Design
ICST 2018   The 11th IEEE International Conference on Software Testing, Verification, and Validation (ICST 2018)
IEEE HiPC 2018   25th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC 2018)