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ParaFPGA 2019 : Parallel Computing with FPGAs


When Sep 10, 2019 - Sep 13, 2019
Where Prague, Czech Republic
Submission Deadline Jun 17, 2019
Notification Due Jul 20, 2019
Final Version Due Aug 20, 2019
Categories    FPGA   high performance computing   parallel processing   high level synthesis

Call For Papers


ParaFPGA has become a regular track in the Parallel Computing conference to collect and disseminate recent research on the development and use of reconfigurable architectures in high-performance computing. Field Programmable Gate Arrays are becoming mainstream accelerators of data centers, high-end processors, web services and cloud computing. The power of the reconfigurable hardware resides in an ever growing ecosystem of tools, programming environments and applications. High-performance computing requires new avenues and creative solutions to alleviate the power and frequency limitations of today's processors. New reconfigurable architectures and designs are now managed by common languages such as OpenCL combined with dedicated programming and synthesis environments. Still, parallel programming of FPGAs present exciting opportunities for research and development. Therefore this call for papers invites original contributions in or related to the following areas :

- parallel processing using FPGAs in e.g. image processing, deep learning, bioinformatics, smart contracts or cloud computing
- design space exploration tools and techniques
- OpenCL-based FPGA design
- domain specific high-level synthesis languages
- partial reconfiguration to reuse IP-cores
- run-time management of IP-cores
- hybrid CPU/GPU/FPGA systems for e.g. real-time video or automotive systems
- performance evaluation of FPGA architectures and applications


Please submit a full paper of maximum 10 pages or an initial extended abstract of minimal 6 pages following the guidelines on the author guidelines page. The approved contributions will be presented at the conference and the accepted full papers are published in the ParCo proceedings.
Deadline for the submission is 10 June 2019


Steering committee

Gerhard Joubert, Conference committee chair
Ian Foster and Wolfgang E. Nagel, ParCo Program committee chairs
Luděk Kučera and Pavel Tvrdik, Organizing committee chairs
Erik D'Hollander, ParaFPGA organizing chair
Frans Peters, Finance Chair

ParaFPGA program committee

Abdellah Touhafi, Vrije Universiteit Brussel, Belgium, chair
Hal Finkel, Argonne National Laboratory, USA
Frank Hannig, Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
Yun Liang, Peking University, China
Tsutomu Maruyama, University of Tsukuba, Japan
Dionisios Pnevmatikatos, Technical University of Crete, Greece
Viktor Prasanna, University of Southern California, USA
Dirk Stroobandt, Ghent University, Belgium
Wim Vanderbauwhede, University of Glagow, UK
Sotirios G. Ziavras, New Jersey Institute of Technology, USA


- Submission deadline: 10 June 2019 (Full paper or extended abstract)
- Notification of acceptance: 20 July 2019
- Final papers due: 20 August 2019



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