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PATMOS 2018 : PATMOS 2018 28th International Conference on Power and Timing Optimization and Simulation


Conference Series : Power and Timing Modeling, Optimization and Simulation
When Jul 2, 2018 - Jul 4, 2018
Where Platja D'Aro, Spain
Abstract Registration Due Feb 25, 2018
Submission Deadline Mar 11, 2018
Notification Due Apr 6, 2018
Categories    power and timing   modeling and optimization   multi-core   FPGA, GPU

Call For Papers

PATMOS has a history of 30 years, being one of the first conferences focusing on low power.

Starting 2018, PATMOS will be collocated with two complementary conferences, IOLTS and IVSW, forming FEDfRo, the federative event on Design for Robustness. The traditional scope of PATMOS has mainly been about the design of circuits and architectures optimized for highest performance at lowest power consumption. But meanwhile, power-efficiency has become extremely important for many more areas spreading far beyond this traditional R&D niche.

Energy efficiency has become a must in the connected network of battery-operated nodes known as Internet-of-Things (IoT). Wearable devices, home appliances, vehicles and security surveillance systems mostly rely on small sensors that should ideally operate on battery charge for days or even weeks. However, current battery efficiencies do not keep up with the growing demands of IoT nodes for power, forcing us to seek novel techniques for energy harvesting and power optimization. Additionally, energy-efficient ICT (Information and Communication Technology) infrastructures are a key issue for local and global economies. Some predict that, if current trends continue, the electricity consumption caused by the Internet will increase up to 30 times in the year 2030. The strong increase of wireless communication and the growth of cloud computing require orders of magnitude more computational power.

PATMOS 2018 aims to find solutions for both, small-scaled integrated circuits in IoT nodes, and large-scale ICT infrastructures that require massive energy consumption.

The topics of interest include (but are not limited to) the following ones:

- Methodology and tools for analysis, design, simulation and verification of timing and performance of integrated circuits
- Thermal-aware design, synthesis, floorplanning, estimation and optimization
- Ultra-low power systems for IoT
- Energy harvesting
- Power and performance optimization of multi-core architectures
- Compilers, operating systems and runtime systems
- Power analysis and optimization for supercomputing and data centers
- Application of machine learning to implement high-performance systems, neural networks, financial data bases, wearable computing, bioinformatics, security systems, etc.
- Design for aging, aging effects, aging models, aging power and timing analysis
- Reconfigurable accelerators, FPGAs, GPUs, dynamically reconfigurable processing arrays (DRPAs), CAD tools, neuro-inspired accelerators

Additional Information

General Co-chairs:

Marisa Lopez-Vallejo, UPM, Spain
Ruzica Jevtic, CEU San Pablo, Spain

Program Co-chairs

Spiros Nikolaidis University of Thessaloniki, Greece
Alkis Hatzopoulos, University of Thessaloniki, Greece

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