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RTAS 2018 : 2018 IEEE Real-Time and Embedded Technology and Applications Symposium

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Conference Series : Real Time Technology and Applications Symposium
 
Link: http://2018.rtas.org/
 
When Apr 11, 2018 - Apr 13, 2018
Where Porto, Portugal
Submission Deadline Oct 6, 2017
Notification Due Dec 19, 2017
Categories    real-time systems   embedded systems
 

Call For Papers


Call For Papers

Expanded scope: RTAS aims to become the premier conference venue for publishing systems research related to timing issues. The broad scope of RTAS’18 ranges from traditional hard real-time systems to latency-sensitive systems with soft real-time requirements.

RTAS’18 invites papers describing original systems and applications, case studies, methodologies and applied algorithms that contribute to the state of practice in the design, implementation and verification of real-time systems. Papers in the broader field of embedded, networked and cyber-physical systems (including but not limited to emerging domains such as Internet-of-Things (IoT), real-time cloud computing, embedded security, and heterogeneous systems) that consider real-time aspects are welcomed. For submissions to be in scope for RTAS’18, the work must consider some form of real-time requirements; as well as classical hard real-time constraints, these may be in the form of probabilistic, soft real-time, quality of service or latency requirements. The scope of RTAS’18 consists of three tracks: (1) Applications, Real-Time Operating Systems and Run-Time Software, (2) Applied Methodologies and Foundations, and (3) Architectures and Hardware-related Analyses for Real-Time and Embedded Systems. The conference proceedings will be published by IEEE and indexed on IEEE Explore.

Track 1: Applications, Real-Time Operating Systems and Run-Time Software

This track focuses on applications and run-time software for real-time and embedded systems. Relevant areas include, but are not limited to, real-time operating systems, middleware, system utilities, and case studies. Papers discussing design and implementation experiences on real industrial systems are especially encouraged. Papers submitted to this track should focus on specific systems and implementations. Authors must include a section with experimental results performed on a real implementation, or demonstrate applicability to an industrial case study or working system. The experiment or case study discussions must highlight the key lessons learned. Simulation-based results are acceptable only if the authors clearly motivate why it is not possible to develop a real system.

Track 2: Applied Methodologies and Foundations

This track focuses on fundamental models, techniques, methods, and analyses that are applicable to real systems to solve specific problems. General topics relevant to this track include, but are not limited to: scheduling and resource allocation, specification languages and tools, system-level optimization and co-design techniques, design space exploration, verification and validation methodologies. Papers must describe the main context or use-case for the proposed methods giving clear motivating examples based on real systems. The system models and any assumptions used in the derivation of the methods must be applicable to real systems and reflect actual needs. Papers must include a section on experimental results, preferably including a case study based on information from a real system. The use of synthetic workloads and models is however acceptable if appropriately motivated and used to provide a systematic evaluation.

Track 3: Architectures and Hardware-related Analyses for Real-Time and Embedded Systems

This track focuses on novel hardware/software architectures and analysis techniques which relate to the behaviour of real hardware. Topics relevant to this track include, but are not limited to: worst-case execution time analysis, analyses of cache, memory hierarchies and communication infrastructures, SoC design for real-time applications, special purpose functional units and GPU, specialized memory structures, chip multiprocessor and communication, FPGA simulation and prototyping, simulation, compilation and synthesis for novel architectures and applications, and power- and energy-aware analyses and architectures. Papers must include a section on experimental results, preferably including a case study based on information from a real system. The use of synthetic workloads and models is however acceptable if appropriately motivated and used to provide a systematic evaluation.


IMPORTANT DATES

Submissions: October 6, 2017 11:59pm GMT-12 (firm)
Author Rebuttal: November 25th-December 1st, 2017
Notifications: Dec 19, 2017
Conference dates: April 11-13, 2018

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