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RAW 2010 : 17th Reconfigurable Architectures Workshop


Conference Series : Reconfigurable Architectures Workshop
When Apr 19, 2010 - Apr 20, 2010
Where Atlanta, USA
Submission Deadline Nov 15, 2009
Notification Due Dec 18, 2009
Final Version Due Feb 1, 2010
Categories    reconfigurable

Call For Papers

The 17th Reconfigurable Architectures Workshop (RAW 2010) will be held in Atlanta, USA in April 2010. RAW 2010 is associated with the 24th Annual International Parallel & Distributed Processing Symposium (IPDPS 2010) and is sponsored by the IEEE Computer Society's Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers and practitioners to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.

Reconfigurable computing: architectures, devices, algorithms, tools and models

As reconfigurable devices have grown in complexity and capabilities over the years, so has the complexity and variety of applications that must harness their features with unprecedented effectiveness. The key to effectively harnessing these features - heterogeneous fabrics, support for partial and run time reconfiguration (RTR), high speed IO, embedded microprocessors, etc. - includes research on areas such as algorithms, CAD tools, compilers, operating systems, and thermal/precision/fault management. Research challenges within these areas are expected to become even more complex with emerging trends in reconfigurable computing: 3D integration with other FPGA/memory chips, use of nano-technology devices as building blocks, operation at sub-threshold voltages for ultra-low power systems, etc. Furthermore, an appropriate mix of the theoretical foundations of reconfiguration, and practical considerations, including architectures, technologies and tools supporting soft/hard, partial/full, static/run-time reconfiguration is essential to fully reveal and exploit the possibilities created by this powerful computing paradigm. RAW 2010 aims to provide a venue to facilitate creative and productive interaction between all these disciplines.

Topics of Interest

Authors are invited to submit manuscripts of original unpublished research in all areas of reconfigurable computing (foundations, algorithms, hardware architectures, devices, systems-on-chip (SoC), technologies, software tools, and applications). The topics of interest include, but are not limited to:

Models & Architectures

· Theoretical Interconnect
and Computation Models

· RTR Models and Systems

· RTR Hardware Architectures

· Optical Interconnect Models

· Simulation and Prototyping

· Bounds and Complexity Issues

· 3D FPGA Architectures

· Ultra-low power devices

· Thermal models

· Performance prediction models

· Nano technology based devices and architectures
Algorithms & Applications

· Algorithmic Techniques

· Mapping Parallel Algorithms

· Distributed Systems & Networks

· Fault Tolerance Issues

· Reliability Issues

· Wireless and Mobile Systems

· Automotive Applications

· Infotainment & Multimedia

· Biology Inspired Applications

· Thermal management

· Emergent Applications
Design, Technologies & Tools

· Configurable Systems-on-Chip

· Energy Efficiency Issues

· Devices and Circuits

· Reconfiguration Techniques

· Bitstream relocation

· High Level Design Methods

· System Support

· Embedded operating systems

· Adaptive Runtime Systems

· Organic Computing

· CAD tools for 3D FPGAs

· Languages and Compilation Techniques

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