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RePara 2017 : 3rd International Workshop on Reengineering for Parallelism in Heterogeneous Parallel Platforms

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Link: https://www.arcos.inf.uc3m.es/repara2017/
 
When Sep 12, 2017 - Sep 15, 2017
Where Bologna, Italy
Submission Deadline Jun 30, 2017
Notification Due Jul 28, 0217
Final Version Due Oct 15, 2017
Categories    parallel programming   heterogeneous computing   software refactoring
 

Call For Papers

In recent years, traditional processors have not been able to directly translate chip fabrication technology advances intro performance gains. To keep satisfying the demand for computing power, there is a shift from homogeneous machines to heterogeneous architectures combining different kinds of processors (CPUs, GPUs, DSPs, FPGAs, and other accelerators). While this approach has allowed significant performance and energy efficiency benefits, heterogeneous systems are often highly difficult to program with existing tools. To reduce the cost of system development, reengineering techniques emerge as a solution which may help to balance ease-of-development with better performance, better reliability, and lower maintenance costs.

The RePara2017 workshop it aims to join experts from related disciplines to share recent advances in different areas contributing to better transformation of new and legacy applications to different programming models for diverse computing devices in the context of parallel heterogeneous architectures.

Scope and Interests

Topics of interest include, but are not limited to:

High-level parallel programming models, libraries and languages for Heterogeneous Parallel Platforms.
Compiler support for Heterogeneous Parallel Systems.
Description languages for Heterogeneous Parallel Platforms.
Parallel patterns for Heterogeneous Platforms.
Autonomic management of Power/Performance trade-offs.
Automated kernel identification and assessment.
Software refactoring approaches for parallel programming models.
Transformations from source code to reconfigurable hardware.
Integration of FPGA accelerators into refactored software.
Runtimes for software coordination and task mapping in Heterogeneous Parallel Platforms.
Scheduling for Heterogeneous Parallel Platforms.
Performance modeling and prediction in Heterogeneous Parallel Platforms.
Energy efficiency monitoring and prediction in Heterogeneous Parallel Platforms.
Software quality assessment in parallel programming models with special attention to maintainability.
Applying partitioning and mapping for parallel Heterogeneous computing architectures.
Application experiences of refactoring to software in industrial domains.

Workshop publication

Accepted paper will be published in the proceedings of the ParCo 2017 Conference.

Journal Publication

Extended version of selected papers from the workshop will be invited by the RePara2017 program committee for publication, after further revision, in an special issue (to be announced).


Contact

Please email inquiries concerning the workshop to J. Daniel Garcia.

Related Resources

UCHPC 2017   The 10th Workshop on UnConventional High Performance Computing 2017
CPP 2017   Spanish Parallel Programming Contest
ESAA 2017   2nd International Workshop on Enhancing Parallel Scientific Applications with Accelerated HPC
FHPC 2017   The 6th ACM/SIGPLAN Workshop on Functional High-Performance Computing
SANER 2017   24th IEEE International Conference on Software Analysis, Evolution, and Reengineering
IEEE Cluster 2017   International Conference on Cluster Computing
IEEE - ICCC 2017   3rd IEEE International Conference on Computer and Communications
ParCo 2017   Parallel Computing Conference
PDP 2018   The 26th Euromicro International Conference on Parallel, Distributed and Network-Based Processing
ACM--ICCIP 2017   ACM--2017 the 3rd International Conference on Communication and Information Processing (ICCIP 2017)--Ei Compendex, ISI Web of Science and Scopus