posted by organizer: HLDVT17 || 1758 views || tracked by 5 users: [display]

HLDVT 2017 : 19th IEEE International High-Level Design Validation and Test Workshop 2017

FacebookTwitterLinkedInGoogle


Conference Series : High Level Design Validation and Test
 
Link: http://www.ihldvt.com
 
When Oct 5, 2017 - Oct 6, 2017
Where Santa Cruz, CA
Abstract Registration Due Jul 14, 2017
Submission Deadline Jul 23, 2017
Notification Due Aug 24, 2017
Final Version Due Sep 11, 2017
Categories    design validation   design verification   test   SOC
 

Call For Papers

The 19th HLDVT workshop aims to bring together a community of researchers in the areas of design validation and test of hardware, software, cyber-physical systems, smart-systems, biological systems, and bio-chips. The workshop addresses the integration of multiple functions on-chip/in-system at higher levels of design abstraction, and the techniques and methodologies for modeling, analyzing, and validating such systems. In particular, the workshop has become a unique forum for researchers and practitioners to discuss the practical issues associated with validation of extremely large designs in the application fields of: automotive, communication, green computing, healthcare and biological systems.

Topics of interest include, but are not limited to:

Simulation-Based Validation
Formal Verification, and Hybrid Methods
Design Abstraction, and Behavioral Modeling
Error Trace Interpretation, and Debugging
Functional safety/safety-critical system verification
On-Chip, and Core-Based Testing
Test Generation for Defects, Design Errors, and Delay Faults
Hardware/Software, and Mixed-Signal System Co-Validation
Emulation, and Prototyping
Post-silicon Validation, and Debug
Modeling, Simulation and Verification of Cyber-Physical Systems
Design and Test for AMS systems
Variability, Reliability and Dependability management of SoCs.

Paper Submission: The Program Committee invites authors to submit papers not to exceeding 8 pages (in the IEEE two-column conference format with 10-pt font size), describing original and unpublished work. Panels and special session proposals are also invited. All submissions must be made electronically in PDF format using the submission web site: https://easychair.org/conferences/?conf=hldvt17.
Paper Publication and Presenter Registration: All accepted papers will be made available on IEEE Xplore. The submission of a paper or panel proposal will be considered as evidence that upon acceptance, the author(s) will present their work. For the papers to appear in the program and proceedings, at least one different full workshop registration by an author is required before the submission of the camera-ready version. IEEE reserves the right to exclude a paper from distribution (e.g., removal from IEEE Xplore) if the paper is not presented at the workshop.

Related Resources

SIES 2018   13th IEEE International Symposium on Industrial Embedded Systems
ASYNC 2018   24st IEEE International Symposium on Asynchronous Circuits and Systems
PAPP@SAC 2018   Practical Aspects of High-Level Parallel Programming, track of the 33st ACM/SIGAPP Symposium On Applied Computing
DATE 2017   Design, Automation, and Test in Europe
ICST 2017   IEEE International Conference on Software Testing, Verification and Validation (ICST) 2017
ICST 2018   The 11th IEEE International Conference on Software Testing, Verification, and Validation (ICST 2018)
HPDC 2018   The 27th International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC'18)
IEEE TETCI 2018   IEEE Transactions on Emerging Topics in Computational Intelligence Special Issue on Computational Intelligence in Data-Driven Optimization
ISC HPC 2018   ISC High Performance 2018
PLDI 2018   Programming Language Design and Implementation