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ALCHEMY 2017 : Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems


When Jun 12, 2017 - Jun 14, 2017
Where Zurich, Switzerland
Submission Deadline Feb 15, 2017
Notification Due Mar 10, 2017
Categories    many-core computing   parallel computing   high performance computing   programming models

Call For Papers

Call for Paper

5th ALCHEMY Workshop, as part of ICCS 2017

Architecture, Languages, Compilation and
Hardware support for Emerging ManYcore systems

Important Dates:
Submission deadline: 15 February, 2017
Notification to authors: 10th March, 2017
Venue: 12-14th June, 2017, Zurich, Switzerland

As the future aims toward increasing parallelism and heterogeneity of
systems to tackle the so-called power-wall while permitting a roadmap
of increased performance, several challenges rise for programming such
systems. The ALCHEMY workshop goal is to show some of these relevant
challenges and finding ways to tackle them, while permitting programmers
to focus on important part of application designs and letting compilers
or runtime optimization do most of the work toward good performance.

The ALCHEMY workshop is the Many-core track of ICCS. It is also a good
place of exchange between the traditional HPC domain of research and
all the emerging HPES (High Performance Embedded Systems) domain, since
the programming issues are mostly the same, with a relatively high
cost of communication and the difficulty to program hundreds of cores
often under performance and power usage constraints.

Original high quality submission are encouraged on all topics related to
many-core programming issues including (but not limited to):
* Programming models and languages for many-cores
* Compilers for programming languages
* Runtime generation for parallel programming on manycores
* Architecture support for massive parallelism management
* Enhanced communications for CMP/manycores
* Shared memory, data consistency models and protocols
* New operating systems, or dedicated OS
* Security, crypto systems for manycores
* User feedback on existing manycore architectures
(experiments with Adapteva Epiphany, Intel Phi, Kalray MPPA, ST
STHorm, Tilera Gx, TSAR..etc)
* Many-core integration within HPC systems (micro-servers)

Authors should submit their paper through Easychair, using a maximum of
10 pages
(single column) Procedia style for full papers, or alternatively 2 to 4
for short papers (Poster and presentation, or presentation only).

Submission link:
(paper templates are available on the submission page (top right)

ALCHEMY track site:

== Program Committee (to be extended) ==
* Jeronimo CASTRILLON, CFAED / TU Dresden, Germany
* Camille COTI, Université de Paris-Nord, France
* Loïc CUDENNEC, CEA, LIST, France
* Diana GÖHRINGER, Ruhr Universitaet Bochum, Germany
* Sven KAROL, Baselabs GmbH, Germany
* Vianney LAPOTRE, Université de Bretagne-Sud, France
* Stéphane LOUISE, CEA, LIST, France
* Vania MARANGOZOVA-MARTIN, Université Joseph-Fourier Grenoble, France
* Marco MATTAVELLI, École Polytechnique Fédérale de Lausanne (EPFL), Switzerland
* Emil MATUS, TU Dresden, Germany
* Eric PETIT, Intel, France
* Erwan PIRIOU, CEA, LIST, France
* Antoniu POP, University of Manchester, UK
* Jason RIEDY, Georgia Institute of Technology, USA
* Martha Johanna SEPULVEDA FLORES, Institute for Security in Information Technology, TU Munich, Germany

== Program Chairing ==
* Martha Johanna Sepulveda Flores, TU München (Germany)
* Jeronimo Castrillon, TU Dresden (Germany)
* Vania Marangozova-Martin, IMAG Grenoble (France)

== General Chair ==
* Loic Cudennec, CEA LIST (France)
* Stephane Louise, CEA LIST (France)

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