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IDT 2016 : The 11th International Design & Test Symposium

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Link: http://www.ceslab.org/IDT2016/
 
When Dec 18, 2016 - Dec 20, 2016
Where Tunisia, Hammamet
Submission Deadline Nov 3, 2016
Notification Due Nov 20, 2016
Final Version Due Dec 4, 2016
Categories    design methods and tools   test and reliability
 

Call For Papers

The 11th International Design & Test Symposium (IDT 2016)
18-20 December 2016, Hammamet, Tunisia
http://www.ceslab.org/IDT2016/

The International Design and Test Symposium is an IEEE technically co-sponsored event devoted to exploring emerging challenges and new concepts related to the design, test, automation, and reliability of electronic systems ranging from integrated circuits through multi-chip modules and printed circuit boards to full systems. IDT is a unique forum to discuss best practices and novel ideas in design methods, tools, test, and reliability held in the Middle East and Africa (MEA) region. The Symposium is initiating in affiliation with the IEEE TTTC (Test Technology Technical Council) and the 2016 edition is organized and sponsored by CES Laboratory and the University of Sfax. It is also technically co-sponsored by IEEE CEDA (Council on Electronic Design Automation). The official language of the conference is English.
Topics of interest include but are not limited to:

Design Methods and Tools
• IP and SOC Design
• Multiprocessor/Multi-core Systems
• Embedded Systems
• DFX
• Analog, Mixed Signal and RF Design
• High Speed Circuits Design
• Design of MEMS and MOEMS
• Low Voltage and Low Power systems
• Innovative Technologies
• IoT design
• Simulation, Validation & Verification
• System Specification and Modeling
• Formal Methods and Verification
• System Design/Synthesis/Optimization

Test and Reliability
• Yield Optimization
• IP and SOC Testing
• Multiprocessor/Multi-Core Systems Test
• Memory & FPGA Test & Repair
• automotive reliability & test
• High Speed, Analog, Mixed Signal & RF Testing
• MEMS/MOEMS Testing
• Defect and Fault Modeling
• DFT, BIST and BISR
• On-line Testing / Fault Tolerance
• Fault Simulation, ATPG
• Reliability Failures/ Modeling
• Circuit Reliability
• Electronic System Reliability

Regular Submissions: IDT 2016 invites original, unpublished paper submissions. Paper submissions should be complete manuscripts, not exceeding six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format. Authors should clearly explain the significance of the work, highlight novel features and describe its current status. All submissions are to be made electronically through the IDT 2016 website. Detailed instructions for submissions are to be found at the IDT 2016 website. A submission will be considered as evidence that, upon acceptance, the author(s) will prepare the final camera-ready version of the paper in time for inclusion in the proceedings, and will present the paper at the conference. All papers will be taken into consideration for the IDT 2016 Best Paper Award. In addition, a set of best papers will be considered for IEEE Design & Test.
Special Session proposals: IDT 2016 solicits Special Sessions, such as (a) Hot-Topic session addressing and discussing the challenges in topics of interest to the symposium, (b) Embedded tutorials introducing and discussing topics of interest to the attendees, (c) Panels discussing visionary and/or controversial issues. Special Session proposals consist of an extended summary (up to 1500 words) as PDF file, describing the session content and format, and must be submitted electronically through the IDT 2016 website.

Publications: IDT 2016 will produce a Formal Proceedings of accepted papers, published under IEEEXplore. The proceedings will be available to all participants during the symposium.

Important deadlines:
• Regular Paper submission: November 03, 2016
• Extended Special sessions and tutorials proposals: October 31, 2016
• Notification of acceptance: November 20, 2016
• Camera Ready papers for Symposium Digest: December 04, 2016

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