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ACTIVE 2017 : First International Workshop on Data Management on Virtualized Active Systems (In Conjunction with the IEEE ICDE 2017)

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Link: https://active-conf.github.io/
 
When Apr 22, 2017 - Apr 22, 2017
Where San Diego, CA
Submission Deadline Dec 23, 2016
Notification Due Jan 15, 2017
Final Version Due Jan 24, 2017
Categories    databases   SSD   gpu   FPGA
 

Call For Papers

CALL FOR PAPERS - Deadline Extended -

Active'17: First International Workshop on Data Management on Virtualized
Active Systems (In Conjunction with IEEE ICDE 2017).
San Diego, CA, USA. April 22, 2017

https://active-conf.github.io/


OBJECTIVES:
The objective of this one-day workshop is to bring researchers and
practitioners together in order to investigate opportunities in exploiting
virtualized active (compute-enabled) technologies such as active memory,
active network, and active storage for accelerating data-intensive workloads.
Furthermore, this workshop aims at investigating issues in realizing active
capabilities (enabled by hardware accelerators such as SSDs, GPUs, FPGAs, and
ASICs) in the entire system stack running on cloud. The workshop aims at
providing a forum for academia and industry to exchange ideas through research
and position papers.


SCOPE:
The recent popularity of Big Data applications has renewed interest in
developing and optimizing data-intensive workloads. In addition to the
traditional scientific computing domain, Big Data phenomena are observed in a
variety of new domains such as Internet of Things (IoT), social analytic,
personalized health and precision medicine, bioinformatics, energy
informatics, and emergency response and disaster management. The Big Data
workloads are characterized by unprecedented volumes and velocity of data,
both historic and transient, very high-speed data flows (e.g., from sensor
networks), and diverse variety of data from completely unstructured text
documents, to structured relational tables or matrices, to photos and videos.
Analyzing vast quantities of such complex data (partially powered by machine
learning) is becoming as important as the traditional massive-scale data
management.

Unfortunately, existing approaches to solve data-intensive problems are
woefully inadequate to address the challenges raised by the Big Data
applications. Specifically, these approaches require data to be processed to
be moved near the computing resources. These data movement costs can be
prohibitive for large data sets such as those observed in the aforementioned
workloads. One way to address this problem is to bring virtualized computing
resources closer to data, whether it is at rest or in motion. The premise of
"active" systems is a new holistic view of the system in which every data
medium (whether volatile or non-volatile) and every communication channel
becomes compute-enabled.

Although prototypes of systems with active technologies are currently
available, there is a very limited exploitation of their capabilities in
real-life problems. The proposed workshop aims to evaluate different aspects
of the active systems stack and understand the impact of active technologies
(including but not limited to hardware accelerators such as SSDs, GPUs, FPGAs,
and ASICs) on different applications workloads. Specifically, the workshop
aims to understand the role of modern hardware to enable active medium (whether
network, storage, or memory) over the entire path and the lifecycle of data,
especially as today's database system opt for hierarchies of storage and
memory. Furthermore, we aim to revisit the interplay between algorithmic
modeling, compiler and programming languages, virtualized runtime systems and
environments, and hardware implementations, for effective exploitation of
active technologies.


TOPICS COVERED INCLUDE, BUT ARE NOT LIMITED TO:
1) Data Management Issues in Active Systems (e.g., active network, storage, and memory)
2) Data Management Issues in Software-Hardware-System Co-design
3) Active Technologies (e.g., SSDs, GPUs, FPGAs, and ASICs) in Co-design Architectures
4) Query Orchestration and Execution Models in Co-design Architectures
5) Enabling Partial Computation or Best Effort Computation in Co-design Architectures
6) Offloading Computation to Accelerators in Co-processor Design
7) Placing Accelerator on the Data Path in Co-placement Design
8) Programming Methodologies for Data-intensive Workloads on Active Technologies
9) Virtualizing Active Technologies on Cloud (e.g., Scalability and Security)
10) Exploiting Active Technologies in Modern Databases (e.g., NoSQL and NewSQL)
11) Extending Runtime of Big Data Systems (e.g., Spark, Hadoop) with Active Technologies
12) Autonomic Tuning for Data Management Workloads in Co-design Architectures
13) Algorithms and Performance Models for Active Memory and Storage Sub-systems
14) Novel Applications of Low-Power Modern Processors, GPUs, FPGAs, and ASICs
15) Novel Applications of Transactional Memory in Co-design Architectures
16) Workload-aware System Co-design for Emerging Applications
(e.g., Internet-of-Things, Personalized Health, and Precision Medicine)


Submission Dates:
Paper submissions: December 23, 2016
Notification to authors: January 15, 2017
Camera-ready copy due: January 24, 2017
Workshops: April 22, 2017


WORKSHOP CO-CHAIRS:
Rajesh R. Bordawekar (IBM T.J. Watson Research Center)
Mohammad Sadoghi (Purdue University)

PUBLICITY CHAIR:
Kaiwen Zhang (Technical University of Munich)

PROGRAM COMMITTEE:
Nipun Agarwal (Oracle)
Spyros Blanas (Ohio State University)
Khuzaima Daudjee (University of Waterloo)
Peter M. Fischer (University of Freiburg)
Blake G. Fitch (IBM Research, Zurich)
Boris Glavic (Illinois Institute of Technology)
Hans-Arno Jacobsen (Middleware Systems Research Group)
Kajan Kanagaratnam (IBM, Toronto)
Tirthankar Lahiri (Oracle)
Mohammadreza Najafi (Technical University of Munich)
Ilia Petrov (TU Darmstadt)
Tilmann Rabl (TU Berlin)
Tiark Rompf (Purdue University)
Mohamed Sarwat (Arizona State University)
Divesh Srivastava (AT&T Labs Research)
Dina Thomas (Pure Storage)
Stratis Viglas (University of Edinburgh)


STRUCTURE:
Active 2017 will be organized along three tracks (all accepted papers
will be presented at the workshop):

1) Regular Research Papers: These papers should report original research
results or significant case studies. They should be at most 8 pages.

2) Position Papers: These papers should report novel research directions
or identify challenging problems. They should be at most 4 pages.

3) Abstracts: These papers should report on preliminary and ongoing work
or exploratory research directions. They should be at most 1 page.

All submissions must be prepared according to the ICDE formatting guidelines.


PROCEEDINGS:
All accepted papers will be published in the ICDE proceedings and will also
become publicly available through the IEEE Xplore.

SUBMISSION INFORMATION:
Papers have to be submitted electronically as PDF files via EasyChair.

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