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DSD 2016 : 19th Euromicro Conference on Digital System Design

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Link: http://dsd-seaa2016.cs.ucy.ac.cy/
 
When Aug 31, 2016 - Sep 2, 2016
Where Limassol
Submission Deadline Apr 24, 2016
Notification Due May 13, 2016
Final Version Due Jul 4, 2016
Categories    embedded   pervasive and high-performance   microarchitectures   digital circuits
 

Call For Papers

Call for Papers DSD 2016 Main Track

The Euromicro Conference on Digital System Design (DSD) addresses all aspects of (embedded, pervasive and high-performance) digital and mixed hardware/software system engineering, down to microarchitectures, digital circuits and VLSI techniques. It is a discussion forum for researchers and engineers from academia and industry working on state-of-the-art investigations, development and applications.

It focuses on today's and future challenges of advanced system architectures for embedded and high-performance HW/SW systems, application analysis and parallelization, design automation for all design levels, as well as, on modern implementation technologies from full custom in nanometer technology nodes, through FPGAs, to multi-core infrastructures. It covers a multitude of highly relevant design aspects from system, hardware and embedded-software specification, modeling, analysis, synthesis and validation, through system adaptability, security, dependability and fault tolerance, to system energy consumption minimization and multi-objective optimization.

Authors are kindly invited to submit their work according (but not limited) to the seven main topics of the conference main track. In addition, eight Special Sessions (with their own coordinators and subprogram committees) do also welcome contributions in specific themes of particular interest. All papers are reviewed following guidelines, quality requirements and thresholds that are common to all committees.

You may download the CfP here: long version, short version



IMPORTANT DATES

Deadline for paper submission: April 8th
Notification of acceptance: May 30th
Camera ready papers: June 27th

MAIN TRACK TOPICS

T1: Advanced applications of embedded and cyber-physical systems
T2: Application analysis and parallelization for embedded and high-performance design
T3: Specification, modeling, verification and test for systems, hardware and embedded software
T4: Design and synthesis of systems, hardware and embedded software
T5: Systems-on-a-chip and networks-on-a-chip
T6: Programmable/re-configurable/adaptable architectures
T7: New issues introduced by emerging technologies


MAIN TOPICS DESCRIPTION

T1: Advanced applications of embedded and cyber-physical systems
Challenging and highly-demanding modern applications in (wireless) communication and networking; networked electronic media, multimedia and ambient intelligence; image and video processing; mobile systems; ubiquitous, wearable and implanted systems; military, space, avionics, measurement, control and automotive applications; wireless sensor network applications; surveillance and security; environmental, agriculture, urban, building, transportation, traffic, energy, hazard and disaster monitoring and control.

T2: Application analysis and parallelization for embedded and high-performance hardware and software design
Application profiling, characterization and bottleneck detection; application restructuring for parallelism; application parallelization, information-flow analysis, scheduling and mapping for application-specific processor; MPSoC memory and communication architecture synthesis; HW/SW co-design and algorithm/architecture matching; combined hardware/software design space exploration and HW/SW system multi-objective optimization; parallelization, scheduling and mapping of applications for (heterogeneous) processor and MPSoC architectures; re-targetable (application-specific) compilation; architectural support for compilers/programming models; performance, energy consumption and other parametric analysis for HW/SW systems; analytical modeling and simulation tools; benchmark applications, workload and benchmarking for heterogeneous HW/SW systems; virtual and FPGA-based system prototyping.

T3: Specification, modeling, analysis, verification and test for systems, hardware and embedded software
Modeling, simulation, design and verification languages; functional, structural and parametric specification and modeling; model-based design and verification; system, hardware, and embedded software analysis, simulation, emulation, prototyping, formal verification, design-for-test and testing at all design levels; dependability, safety, security and fault-tolerance issues.

T4: Design and synthesis of systems, hardware and embedded software
Quality-driven design; model-, platform- and template-based design; design-space exploration; multi-objective optimization; system, processor, memory and communication architecture design; application scheduling and mapping to platforms; application-specific circuits and processors; arithmetic, signal, vector and graphics processing units; hardware accelerators; transaction level modeling and higher-level modeling; synthesis of asynchronous and dataflow systems; methods and CAD tools for analysis and synthesis of systems, architectures, embedded and high-performance software, and hardware at high-, logic- and physical level; methods and CAD tools for modeling, analysis and optimization of performance, energy consumption, reliability, robustness, safety, security, and testability.

T5: Systems-on-a-chip and networks-on-a-chip
(Heterogeneous) multiprocessor systems on-a-chip (MPSoC), hardware multiprocessors and complex accelerators; generic system platforms and platform-based design; processor, memory and communication architectures; 3D MPSoCs and 3D NoCs; ASIP- and GPU-based platforms; software design and programming models for multicore platforms; IP design, standardization and reuse; parallelism exploitation and scalability techniques; virtual components; system of systems; compiler assisted MPSoCs; hardware support for embedded kernels; embedded software features; static, run-time and dynamic optimizations of embedded MPSoCs; benchmarks and benchmarking for MPSoCs; NoC architecture and quality of service; power dissipation and energy issues in SoCs and NoCs.

T6: Programmable/reconfigurable/adaptable architectures
Design methodologies and tools for reconfigurable computing; run-time, partial and dynamic reconfiguration; fine-grained, mixed-grained and coarse-grained reconfigurable architectures; reconfigurable interconnections and NoCs; FPGAs; systems on reconfigurable chip; system FPGAs, structured ASICs; co-processors; processing arrays; programmable fabrics; adaptive computing devices, systems and software; adaptable ASIPs and ASIP-based MPSoCs; hardware accelerators; optimization of FPGA-based cores; shared resource management; novel models, design algorithms and tools for FPGAs and FPGA-based systems; rapid prototyping systems and platforms; adaptable wireless and mobile systems.

T7: New issues introduced by emerging technologies chnologies
Important issues for system, circuit and embedded software design introduced by e.g. the nanometer CMOS and beyond CMOS technologies, 3D integration, optical and other new memory and communication technologies; new human-machine interfaces; neural- and bio-computation; (bio)sensor and sensor network technologies; pervasive and ubiquitous computing (Internet of Things); related design methods and EDA tools; Flexible Digital Radio-digital architecture design and methodologies concepts for multi-standard, multi-mode flexible radios.

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