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DRSN 2016 : International Workshop on High Performance Dynamic Reconfigurable Systems and Networks

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Link: http://tytra.org.uk/drsn/
 
When Jul 18, 2016 - Jul 22, 2016
Where Innsbruck, Austria
Submission Deadline Apr 14, 2016
Notification Due May 2, 2016
Final Version Due May 15, 2016
Categories    reconfigurable architectures   networks on chip   fpgas   high perf' reconfig' computing
 

Call For Papers

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DRSN-2016
International Workshop on High Performance Dynamic Reconfigurable Systems and Networks

July 18 – July 22, 2016
The University of Innsbruck
Innsbruck, Austria

[as part of The International Conference on High Performance Computing & Simulation (HPCS 2016)]

http://tytra.org.uk/drsn/
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Important Dates
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Paper submissions *April 14, 2016 (Final Extension)*
Acceptance notification May 02, 2016
Camera-ready papers
and registration due May 15, 2016
Workshop date July 18 – 22, 2016 (workshop will be on one of these dates)


About
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The International Workshop on High Performance Dynamic Reconfigurable Systems and Networks (DRSN 2016) is intended to serve as a forum and bring together researchers and engineers in both academia and industry to exchange ideas, share experiences, and report original works about all aspects of reconfigurable systems and NoCs in high-performance and/or power-efficient systems. The challenges to wider adoption of these technologies, arising out of programming environments, compilers, and run-time systems are of special interest to this workshop, along with innovations at the architectural level.

This workshop is part of The International Conference on High Performance Computing & Simulation (HPCS 2016, http://hpcs2016.cisedu.info/)


Topics of Interest
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The DRSN Workshop topics of interest include (but are not limited to) the following:

* Compilation, Programming Languages, and Domain-Specific Languages for HPRC
* Tools, Frameworks, Design-flows for developing high-performance reconfigurable systems
* Virtual Machines, Middleware, Run-time and Operating Systems
* Applications of FPGAs and RS, including big-data and big-compute applications
* Heterogeneous high performance computing
* High-level and pure software programming for reconfigurable computing architectures
* Tools for design space exploration of reconfigurable systems and NoC-based systems
* Benchmarks: Compute performance and/or power and cost efficiency for cloud/HPC with reconfigurable architectures using FPGAs
* Novel NoC Architectures for high-performance systems
* Systems software support for advanced NoC-based systems
* NoC-aware compilation and runtime systems
* Reliability, scalability, availability, and fault tolerance
* Area, energy, and performance evaluation
* Case studies and FPGA-based implementation of reconfigurable systems and NoC-based systems
* Mapping and scheduling of tasks onto NoC-based systems
* Self-reconfiguration and self-optimization for HPC
* Reconfigurable computing education


Publication
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Accepted papers will be published in the Conference proceedings of the host conference, HPCS 2016. Instructions for final manuscript format and requirements will be posted on the HPCS 2016 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. As in the past, we plan to include the proceedings in the IEEE Digital Library and have it indexed in all major indexing services accordingly.

A planned special issue of the Journal of Concurrency and Computation: Practice and Experience will be available for selected papers of the conference. Best papers will be invited to submit an extended version.


Instructions for Authors
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You are invited to submit original and unpublished research on the topics of interest, and other topics related to dynamic reconfigurable systems and networks. Submitted papers must not have been published or simultaneously submitted elsewhere.

For *regular papers*, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors’ names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. *Short papers* (up to 4 pages), *poster papers* and *posters* (please refer to http://hpcs2016.cisedu.info/1-call-for-papers/call-for-posters for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments.

HPCS 2016, which is our host conference, uses IEEE manuscript templates for conference proceedings. For paper formatting instructions and *templates*, please refer to the instructions on the HPCS website here: http://hpcs2016.cisedu.info/6-participants/authors-info

Submit a PDF copy of your full manuscript to the workshop paper submission EasyChair site at https://easychair.org/conferences/?conf=drsn2016. Acknowledgement will be sent within 48 hours of submission.

Paper Review and Presentation
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Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS 2016 conference (http://hpcs2016.cisedu.info/) to present the paper at the workshop.


Technical Program Committee
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* Hideharu Amano, Keio University, Japan
* Masoud Daneshtalab, KTH Royal Institute of Technology, Sweden
* Martin Herbordt, Boston University, Massachusetts, USA
* Miriam Leeser, Northeastern University, Massachusetts, USA
* Martin Margala, University of Massachusetts – Lowell, Massachusetts, USA
* Jari Nurmi, Tampere University of Technology, Finland
* Muhammad Adeel Pasha, Lahore University of Management Sciences (LUMS), Pakistan
* Thilo Pionteck, University of Lübeck, Germany
* Oren Segal, University of Massachusetts-Lowell, Massachusetts, USA
* Zain Ul-Abdin, Halmstad University, Sweden
* Dirk Stroobandt, Ghent University, Belgium
* Rene Cumplido, INAOE, Mexico
* Nasibeh Nasiri, University of Massachusetts-Lowell, Massachusetts, USA
* Sairahul Chalamalasetti, Hewlett Packard, USA
* Aaron Smith, Microsoft Research, USA


Organizers
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Wim Vanderbauwhede, University of Glasgow, UK
Syed Waqar Nabi, University of Glasgow, UK


Contact
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Please find contact details of workshop organizers here: http://tytra.org.uk/drsn/committees/

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