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DS-MC2 @ MCSoC 2016 : Special Session on Dark Silicon Aware Multi-core and Many-core Systems Hosted by IEEE MCSoC Conference

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Link: http://mcsoc-forum.org/
 
When Sep 21, 2016 - Sep 23, 2016
Where Lyon, France
Submission Deadline Apr 30, 2016
Notification Due Jun 24, 2016
Final Version Due Jul 15, 2016
Categories    computer architecture   multicore systems   parallel processing   embedded systems
 

Call For Papers

This special session focuses on all aspects of energy-efficient computing in parallel multi- and many-core systems for the dark silicon era. The goal of this special session is to bring together researchers from this community to corporately address challenges that limit higher data-densities and efficient energy utilization in application areas where low power consumption combined with dependable operation is required. The achievements of this special sessions can have a great potential to contribute to the realization of near future computing systems and applications, such as data intensive embedded servers, hand-held consumer devices, and Internet-of-Things. DS-MC2 presents new ideas in the dark silicon aware multi- and many-core systems field such as theory and modeling, scalable and energy-efficient design approaches and frameworks, algorithms, analysis and comparison, design techniques and emerging implementations. Authors are invited to submit high quality papers representing original work from both the academia and industry in (but not limited to) the following topics focusing on energy efficient multi- and many-core:

* Energy and thermal aware application mapping and scheduling
* Energy- and thermal-aware dark silicon system design and optimization
* Adaptive 3D architectures
* Adaptive off-chip/on-chip communication architectures including networks-on-chip
* On-line power monitoring and management
* Programming models, tools, languages and compilers to support energy-aware reconfigurable computing
* Low-power monitor and sensor circuits
* Reconfigurable and/or heterogeneous system architecture
* Energy efficient defect/fault tolerance, testing, and reliability
* Aging aware design, energy- and thermal-related reliability issues
* Energy-proportional systems
* Energy efficient and hybrid memory architectures and technologies



Session Chairs:

Hannu Tenhunen, Royal Institute of Technology, Sweden
Pasi Liljeberg, University of Turku, Finland
Amir. M. Rahmani, University of Turku, Finland


Submission guidelines:

Submissions must be in PDF and should not exceed 8 pages. The submission must adhere to the two-column IEEE style using 10 pt. fonts. The page limit includes all figures and references. All pages should be numbered. Please make use of the following link to help you in the preparation and submission of your final manuscript: http://www.computer.org/portal/web/cscps/submission


Publication:

Proceedings will be published by the IEEE CPS in the same volume of the main track. Authors of accepted papers are expected to register and present their papers at the symposium. Symposium proceedings will be included in the Computer Society Digital Library CSDL and IEEE Xplore. All CPS conference publications are also submitted for indexing to EI’s Engineering Information Index, Compendex, and ISI Thomson’s Scientific and Technical Proceedings, ISTP/ISI Proceedings, and ISI Thomson.

Authors of selected papers will be invited to submit extended article versions to one of the ISI-indexed high-quality journals.


Contacts:

Amir M. Rahmani
Department of Information Technology
University of Turku, Finland
E-mail: amir(-dot-)rahmani(-at-)utu(-dot-)fi
Tel: (+358) 443-462629

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