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MICRO 2016 : International Symposium on Microarchitecture

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Conference Series : International Symposium on Microarchitecture
 
Link: http://microarch.org/micro49/index.php
 
When Oct 15, 2016 - Oct 19, 2016
Where Taiwan, Taipei
Abstract Registration Due Apr 3, 2016
Submission Deadline Apr 10, 2016
Notification Due Jun 25, 2016
Categories    computer architecture   compilers   microarchitecture
 

Call For Papers

=====================================================

The 49th Annual IEEE/ACM International Symposium on
Microarchitecture (MICRO-49)

=====================================================

***MICRO 2016 has an earlier deadline than usual***

http://www.microarch.org/micro49/

October 15-19, 2016, Taipei, Taiwan

Co-sponsored by IEEE-CS TC-uARCH and ACM SIGMICRO


== IMPORTANT DATES ==

Abstracts due : April 3rd, 2016
Papers due : April 10th, 2016
Rebuttal period : June 6th - June 10th, 2016
Notifications : June 25th, 2016

== Topics ==

* Processor, memory, interconnect, and storage architectures
* Hardware, software, and hybrid techniques for improving system
performance, energy-efficiency, cost, complexity, predictability, quality of
service, reliability, dependability, security, scalability, programmer
productivity, etc.
* Processor, memory, storage, interconnect designs
* Architectures for instruction-level, thread-level, and memory-level
parallelism: superscalar, VLIW, data-parallel, multithreaded, multicore,
manycore, etc.
* Compiler and microarchitectural techniques for parallelism (ILP,
TLP, MLP)
* Low-power, high-performance, and cost/complexity-efficient
architectures
* Architectures for emerging platforms, including smartphones,
tablets, cloud/datacenter, etc.
* Architectures and compilers for embedded processors, DSPs, GPUs,
ASIPs (network processors, multimedia, wireless, etc.)
* Advanced software/hardware speculation and prediction schemes
* Microarchitecture techniques to better support system software,
programming languages, programmability, and compilation
* Microarchitecture modeling and simulation methodology
* Insightful experimental and comparative evaluation and analysis of
existing microarchitectures, hardware/software mechanisms and workloads

== Organizing Committee ==

General Co-Chairs
* Wei-Chung Hsu, Natl. Taiwan U.
* Chia-Lin Yang, Natl. Taiwan U.

Program Co-Chairs
* Mikko Lipasti, Univ. Wisconsin
* Hsien-Hsin Lee, TSMC

Tutorial and Workshops Chair
* David Brooks, Harvard

Local Arrangements
* Shiao-Li Charles Tsao, NCTU
* Pi-Cheng Hsiu, Academia Sinica

Publication Chair
* Bo-Cheng Charles Lai, NCTU

Publicity Co-Chairs
* Koji Inoue, Kyushu Univ.
* Vijay Janapa Reddi, UT Austin
* Albert Cohen, INRIA

Finance Co-Chairs
* Antonia Zhai, U. of Minnesota
* Yi-Jung Chen, NCNU

Web Chair
* Hung-Wei Tseng, UC San Diego

Submission Chair
* Chih-Chen Kao, Natl. Taiwan U.

Registration Chair
* Ren-Shuo Liu, NTHU

Industrial liaison
* Tien-Fu Chen, NCTU
* Mu-Tien Chang, Samsung USA
* Dongrui Fan, ICT

Travel Award Chair
* Carole-Jean Wu, ASU

Steering Committee
* Richard Belgard, Consultant, Chair
* David Albonesi,Cornell
* Tom Conte, Georgia Tech
* Kemal Ebcioglu, Global Supercomputing
* Matthew Farrens, UC Davis
* Scott Mahlke, Univ. of Michigan
* Bill Mangione-Smith, Consultant
* Onur Mutlu, CMU
* Yale Patt, UT Austin
* Milos Prvulovic, Georgia Tech

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