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ALCHEMY 2016 : Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems

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Link: https://sites.google.com/site/alchemyworkshop/
 
When Jun 6, 2016 - Jun 8, 2016
Where San Diego, CA, USA
Submission Deadline Feb 8, 2016
Notification Due Mar 10, 2016
Final Version Due Mar 31, 2016
Categories    many-core computing   parallel computing   high performance computing   programming models
 

Call For Papers

***************************************************************************************
* ALCHEMY Workshop 2016
* Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems
*
* Held in conjunction with the International Conference on Computational Science (ICCS 2016)
* San Diego, CA, USA, 6-8 June 2016
*
* http://sites.google.com/site/alchemyworkshop
* Important dates are synchronized with the ICCS meeting
***************************************************************************************

The International Conference on Computational Science is an annual
conference that brings together researchers and scientists from mathematics
and computer science as basic computing disciplines, researchers from various
application areas who are pioneering computational methods in sciences such
as physics, chemistry, life sciences, and engineering, as well as in arts and
humanitarian fields, to discuss problems and solutions in the area, to identify new
issues, and to shape future directions for research.

Call for Papers
***************

Massively parallel processors have entered high performance computing
architectures, as well as embedded systems. In this
context, developers of parallel applications, including heavy
simulations and scientific calculations will undoubtedly have to cope
with many-core processors at the early design steps.

In the past sessions of the Alchemy workshop, held together with
the ICCS meeting, we have presented significant contributions on the
design of many-core processors, both in the hardware and the software
programming environment sides, as well as some industrial-grade
application case studies. In this 2016 session, we seek academic
and industrial works that contribute to the design and the
programmability of many-core processors.

Topics include, but are not limited to:
* Programming models and languages for many-cores
* Compilers for programming languages
* Runtime generation for parallel programming on manycores
* Architecture support for massive parallelism management
* Enhanced communications for CMP/manycores
* Shared memory, data consistency models and protocols
* New operating systems, or dedicated OS
* Security, crypto systems for manycores
* User feedback on existing manycore architectures
(experiments with Adapteva Epiphany, Intel Phi, Kalray MPPA, ST
STHorm, Tilera Gx, TSAR..etc)
* Many-core integration within HPC systems (micro-servers)

Important Dates
*****************

When - Jun 6, 2016 - Jun 8, 2016
Where - San Diego, CA, USA
Submission Deadline - Feb 8, 2016 (extended)
Notification Due - Mar 10, 2016
Final Version Due - Mar 31, 2016


Submission
**************

This year, there will be two formats for the presentation at the
workshop. The usual full-length paper is 10 pages according to the ICCS
format, and the short-paper format well fitted for works in progress,
with a maximum of 2 pages. The accepted papers for full-length paper
will be published alongside with the ICCS proceedings in Procedia
Computer Science, whereas the short-papers will be presentation and
poster only at the conference (with proceedings and presentations
available from the workshop website).

The manuscripts of up to 10 pages, written in English and formatted according to
the EasyChair templates, should be submitted electronically.
Templates are available for download in the Easychair right-hand-side menu
in a “New submission” mode.
https://easychair.org/conferences/?conf=iccs20160


Program Chair
*****************

Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK
Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France
Antoniu POP, University of Manchester, UK


Program Committee
*****************
(to be extended)
Jeronimo CASTRILLON, CFAED / TU Dresden, Germany
Camille COTI, Université de Paris-Nord, France
Loïc CUDENNEC, CEA, LIST, France
Tingxing DONG, Radeon Technologies Group, AMD, USA
Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK
Daniel ETIEMBLE, Université de Paris-Sud, France
Vincent GRAMOLI, NICTA / University of Sydney, Australia
Sven KAROL, TU Dresden, Germany
Christos KARTSAKLIS, Oak Ridge National Laboratory, USA
Michihiro KOIBUCHI, National Institute of Informatics, Japan
Vianney LAPOTRE, Université de Bretagne-Sud, France
Stéphane LOUISE, CEA, LIST, France
Marco MATTAVELLI, École Polytechnique Fédérale de Lausanne (EPFL), Switzerland
Maximilian ODENDAHL, Silexica / RWTH Aachen University, Germany
Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France
Erwan PIRIOU, CEA, LIST, France
Antoniu POP, University of Manchester, UK
Jason RIEDY, Georgia Institute of Technology, USA
Thomas ROPARS, LIG / Université de Grenoble 1, France
Martha Johanna SEPULVEDA, Institute for Security in Information Technology, TU Munich, Germany
Philippe THIERRY, Intel Corporation, France




General Chair
*****************

Loïc CUDENNEC, CEA, LIST, France
Stéphane LOUISE, CEA, LIST, France


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