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RAW 2016 : Reconfigurable Architectures Workshop


Conference Series : Reconfigurable Architectures Workshop
When May 23, 2016 - May 24, 2016
Where Chicago, Illinois USA
Abstract Registration Due Jan 4, 2016
Submission Deadline Jan 8, 2016
Notification Due Feb 16, 2016
Final Version Due Feb 26, 2016
Categories    reconfigurable computing

Call For Papers

The 23rd Reconfigurable Architectures Workshop (RAW 2016) will be held in Chicago, Illinois USA in May 2016. RAW 2016 is associated with the 30th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2016) and is sponsored by the IEEE Computer Society Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.

A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.

Authors are invited to submit manuscripts of original unpublished research in all areas of reconfigurable systems, including architectures, algorithms, applications, software and cross-cutting areas.

Topics of interest include, but are not limited to:

Architectures & Algorithms

· Theoretical Interconnect and Computation Models

· Algorithmic Techniques and Mapping

· Run-Time Reconfiguration Models and Architectures

· Emerging Technologies (optical models, 3D Interconnects, devices)

· Bounds and Complexity Issues

· Analog Arrays

Reconfigurable Systems & Applications

· Reconfigurable Accelerators (HPC, Bioinformatics, Acceleration Applications in Finance, Data Mining, Big Data, and Analytics)

· Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)

· FPGA-based MPSoC and Multicore

· Distributed Systems and Networks

· Wireless and Mobile Systems

· Emerging applications (Organic Computing, Biology-Inspired Solutions)

· Critical issues (Security, Energy efficiency, Fault-Tolerance)

Software & Tools

· Operating Systems and High Level Synthesis

· High-Level Design Methods (Hardware/Software Co-design, Compilers)

· System Support (Soft Processor Programming)

· Runtime Support

· Reconfiguration Techniques (Reusable Artifacts)

· Simulations and Prototyping (Performance Analysis, Verification Tools)

Submission Guidelines:

All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript or, in special cases, may be a summary of relevant work. The manuscript should be not exceed 8 single-spaced, double-column pages using 10-point size font on 8.5X11 inch pages (IEEE conference style) including references, figures and tables. Papers are to be submitted through EDAS. Submitted papers should not have appeared in or be under consideration for a different workshop, conference or journal. It is also expected that all accepted papers (regular or poster) will be presented at the workshop by one of the authors.


IEEE CS Press will publish the IPDPS symposium and workshop abstracts as a printed volume. The complete symposium and workshop proceedings will also be published by IEEE CS Press as a CD-ROM disk and will be available in the IEEE Digital Library.

Related Resources

IEEE Transactions Computers /Emerg. Top. 2016   IEEE Transactions Special Issue on Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures
ARC 2017   13th International Symposium on Applied Reconfigurable Computing
ICA3PP 2016   The 16th International Conference on Algorithms and Architectures for Parallel Processing
RSoC 2016   SPECIAL SESSION ON Reconfigurable System on Chip
TC-TETEC_Special_Issue 2016   Joint Special Section on Innovation in Reconfigurable Computing Fabrics: from Devices to Architectures
FPT 2016   Field-Programmable Technology
FPL 2016   26th International Conference on Field-Programmable Logic and Applications
ANCS 2017   The 13th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
HiPEAC 2017   International Conference on High-Performance Embedded Architectures and Compilers
PDP 2017   The 25th Euromicro International Conference on Parallel, Distributed and Network-Based Processing