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IJHPSA 2016 : Special Issue on: On-Chip Communication: Theory and Applications, Int. J. of High Performance Systems Architecture

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Link: http://www.inderscience.com/info/ingeneral/cfp.php?id=3171
 
When N/A
Where N/A
Submission Deadline Mar 1, 2016
Notification Due Jun 1, 2016
Final Version Due Sep 1, 2016
Categories    HPC   noc   communication   on-chip
 

Call For Papers

Int. J. of High Performance Systems Architecture

Special Issue on: "On-Chip Communication: Theory and Applications"

Guest Editors:
Dr. Luiza de Macedo Mourelle, State University of Rio de Janeiro, Brazil
Dr. Nader Bagherzadeh, University of California, Irvine, USA

In a system-on-chip (SoC) design, and particularly in a multi-processor system-on-chip (MPSoC) design, one of the main issues is the interconnection among components, from point-to-point to 3D network-on-chips (NoC). The decision of which kind of interconnection to apply can be based on power consumption, performance, cost and design cycle time. The increasing complexity of applications directly impacts the complexity of on-chip communication, demanding modelling and simulation of new design strategies to optimise design parameters.

For this special issue we invite original research related to on-chip communication theory and its applications. Both theoretical and applied papers on all aspects of design are welcome.

Subject Coverage

Suitable topics include, but are not limited to, the following:

Communication-centric design flow
Bus-based communication architectures
Current design approaches
Physical and electrical analysis
Models for performance exploration
Power/energy exploration
Design and synthesis of communication architectures
Dynamic bus reconfiguration
Bus encoding techniques
Interface synthesis and optimisation
Secure on-chip communication infrastructure
Custom bus design
Network-on-chips
Optical interconnect
Wireless interconnects
Physical design trends
Communication architectures for multi-processor system-on-chips
On-chip communication in 3D architectures
Hybrid networks
Mapping and scheduling tasks
Reliability and fault-tolerance

Notes for Prospective Authors

Submitted papers should not have been previously published nor be currently under consideration for publication elsewhere. (N.B. Conference papers may only be submitted if the paper has been completely re-written and if appropriate written permissions have been obtained from any copyright holders of the original paper).

All papers are refereed through a peer review process.

All papers must be submitted online. To submit a paper, please read our Submitting articles page.

Important Dates

Submission of manuscripts: 1 March, 2016

Notification of acceptance: 1 June, 2016

Final versions due: 1 September, 2016

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