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HPCA 2016 : The 22nd IEEE International Symposium on High Performance Computer Architecture (HPCA)

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Conference Series : High-Performance Computer Architecture
 
Link: http://hpca22.site.ac.upc.edu/
 
When Mar 12, 2016 - Mar 16, 2016
Where Barcelona, Spain
Abstract Registration Due Sep 4, 2015
Submission Deadline Sep 11, 2015
Notification Due Nov 9, 2015
 

Call For Papers

The 22nd IEEE International Symposium on High Performance Computer Architecture (HPCA)
Barcelona, Spain

The IEEE International Symposium on High Performance Computer
Architecture (HPCA) provides a high-quality forum for scientists
and engineers to present their latest research findings in this
rapidly changing field. Authors are invited to submit papers on
all aspects of high-performance computer architecture. Topics of
interest include, but are not limited to:

– Processor, cache, and memory architectures
– Parallel computer architectures
– Multicore architectures
– Impact of technology on architecture
– Power-efficient architectures and techniques
– Dependable/secure architectures
– High-performance I/O systems
– Embedded and reconfigurable architectures
– Interconnect and network interface architectures
– Architectures for cloud-based HPC and data centers
– Innovative hardware/software trade-offs
– Impact of compilers and system software on architecture
– Performance modeling and evaluation
– Architectures for emerging technology and applications

Authors should submit an abstract by Friday, September 4, 2015,
5pm EST. They should submit the full version of the paper by
Friday, September 11, 2015, 5pm EST. No requests for extensions
will be granted. The full version should be a PDF file that
follows the submission guidelines that will be available at the
conference website. Papers should be submitted for double-blind
review. We anticipate selecting a Best Paper award. All papers
will be evaluated based on their novelty, fundamental insights,
experimental evaluation, and potential for long-term impact.

ORGANIZING COMMITTEE:

General Co-chairs:
Ramon Canal, U. Politècnica de Catalunya
Antonio González, U. Politècnica de Catalunya

Program Chair:
José Martínez, Cornell U.

Program Committee:

Tor Aamodt, U. of British Columbia
David Albonesi, Cornell U.
Rajeev Balasubramonian, U. of Utah
David Brooks, Harvard U.
Christopher Batten, Cornell U.

Brad Beckmann, AMD
Mainak Chaudhuri, IIT Kanpur
Reetuparna Das, U. of Michigan
Joe Devietti, U. of Pennsylvania
Natalie Enright Jerger, U. of Toronto

Hadi Esmaeilzadeh, Georgia Tech
José Flich, U. Politècnica de València
Boris Grot, U. of Edinburgh
Kim Hazelwood, Yahoo! Labs
James Hoe, Carnegie Mellon U.

Jaehyuk Huh, KAIST
Hillery Hunter, IBM Research
Wen-mei Hwu, U. of Illinois
Engin Ipek, U. of Rochester
Mary Jane Irwin, Penn State U.

Ulya Karpuzcu, U. of Minnesota
Stefanos Kaxiras, Uppsala U.
Jangwoo Kim, POSTECH
Martha Kim, Columbia U.
Nam Sung Kim, U. of Wisconsin

Christos Kozyrakis, Stanford U.
Hsien-Hsin Lee, TSMC
Mikko Lipasti, U. of Wisconsin
Scott Mahlke, U. of Michigan
Srilatha Manne, Cavium Networks

Debbie Marr, Intel
Jason Mars, U. of Michigan
Pablo Montesinos, Qualcomm
Trevor Mudge, U. of Michigan
Mike O’Connor, NVIDIA

Alex Ramirez, NVIDIA
José Renau, U.C. Santa Cruz
Daniel Sanchez, MIT
Karu Sankaralingam, U. of Wisconsin
Yanos Sazeides, U. of Cyprus

Dan Sorin, Duke U.
Per Stenström, Chalmers U.
Viji Srinivasan, IBM Research
Carole-Jean Wu, Arizona State U.
Jun Yang, U. of Pittsburgh

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