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ISVLSI 2015 : IEEE Computer Society Annual Symposium on VLSI


Conference Series : IEEE Computer Society Annual Symposium on VLSI
When Jul 8, 2015 - Jul 10, 2015
Where Montpellier, FRANCE
Submission Deadline Feb 25, 2015
Notification Due Apr 20, 2015
Final Version Due May 13, 2015
Categories    vlsi design

Call For Papers



July 8-10, 2015, Montpellier, France

ISVLSI 2015 explores emerging trends, novel ideas and concepts in
the area of VLSI. The Symposium covers a wide range of topics from
emerging technologies to design methods to system level design of
VLSI circuits and systems. The topics also include future design
methodologies and VLSI CAD to support these technologies. For the
past two decades, the conference has been a unique forum for promoting
visionary approaches to VLSI design process and an esteemed venue
for presenting multidisciplinary research. The Symposium brings together
leading scientists and researchers from academia and industry. The
papers from this symposium have been published as special issues of
top archival journals. These traditions will be continued in 2015.
The symposium proceedings will be published by the IEEE Computer
Society Press.

Contributions are sought in the following areas:

1. Digital Circuits and FPGA based Designs (DCF): Digital circuits,
chaos/neural/fuzzy-logic circuits, high-speed/low-power circuits,
energy efficient circuits, near and sub-threshold circuits, memories,
FPGA designs, FPGA based systems.

2. Computer-Aided Design and Verification (CAD): Hardware/software
co-design, logic and behavioral synthesis, simulation and formal
verification, physical design, signal integrity, power and thermal
analysis, statistical approaches.

3. Emerging and Post-CMOS Technologies (EPT): Nanotechnology, molecular
electronics, quantum devices, optical computing, spin-based computing,
biologically-inspired computing, CNT, SET, RTD, QCA, reversible logic,
and CAD tools for emerging technology devices and circuits.

4. System Design and Security (SDS): Structured and Custom Design
methodologies, microprocessors/micro-architectures for performance
and low power, embedded processors, analog/digital/mixed-signal systems,
NoC, power and temperature aware designs, Hardware security, Cryptography,
watermarking, and IP protection, TRNG and security oriented circuits,
PUF circuits.

5. Testing, Reliability, and Fault-Tolerance (TRF): Analog/digital
/mixed-signal testing, design for testability and reliability, online
testing techniques, static and dynamic defect- and fault-recoverability,
and variation-aware design.

6. Analog and Mixed-Signal Circuits (AMS): Analog/mixed-signal circuits,
RF and communication circuits, adaptive circuits, interconnects, VLSI
aspects of sensor and sensor network.

Authors are invited to submit full-length (6 pages maximum), original,
unpublished papers with an abstract (200 words maximum). To enable
blind review, the author list should be omitted from the main document.
Papers violating length and blind-review criteria would be excluded
from the review process. Previously published papers or papers currently
under review for other conferences/journals should not be submitted and
will not be considered for publication.

Paper Submission Site:

Important dates of ISVLSI 2015 are the following:

Special Session Proposal Deadline: January 20, 2015
Regular Paper Submission Deadline: February 25, 2015
Acceptance Notification: April 20, 2015
Submission of Final Version: May 13, 2015

Ph.D. Forum:

ISVLSI 2015 will host a Ph.D. forum: A single 4-page pdf file for Ph.D.
forum paper can be submitted using the following link:

Special Sessions and panels:
ISVLSI 2015 will consider proposals for special sessions as well as

General Co-Chairs:
Aida Todri-Sanial, CNRS-LIRMM, France
Giorgio Di Natale, CNRS-LIRMM, France
Patrick Girard, CNRS-LIRMM, France

Program Co-Chairs:
Saraju P. Mohanty, University of North Texas
Marc Belleville, CEA-LETI, France

Track Chairs:
Digital Circuits and FPGA based Designs (DCF) Track:
Jia Di (University of Arkansas), Elaheh Bozorgzadeh (UCI)
Computer-Aided Design and Verification (CAD) Track:
Massimo Poncino (Polytechnic University of Turin), Mircea Stan (UVA)
Emerging and post-CMOS Technologies (EPT) Track:
Sanjukta Bhanja (USF), Ian O'Connor (INL)
System Design and Security (SDS) Track:
Garrett Rose, (Univ. of Tennessee), Ricardo Chaves (TULisbon)
Testing, Reliability, Fault-Tolerance (TRF) Track:
Alberto Bosio (LIRMM), Lorena Anghel (TIMA)
Analog and Mixed-Signal Circuits (AMS) Track:
Ashok Srivastava (LSU), Florence Azais (LIRMM)

Special Session Chairs:
Monica Pereira (UFRN), Xin Li (CMU)

Local Chair:
Nadine Azemard-Crestani (CNRS-LIRMM)

Financial Chair:
Abdoulaye Gamatie (CNRS-LIRMM)

Industrial Liaison Chair:
Lionel Torres (Univ. of Montpellier)

Publication Chairs:
Mariane Compte (Univ. of Montpellier), Lu Feng (LSU)

Publicity Chairs:
Vasilis Pavlidis (Univ. of Manchester), Prasun Ghosal (IIEST)
Annajirao Garimella (Intel), Nicolas Voros (TEIMES)

Ph.D. Forum Chair:
Michael Huebner (Univ. of Bochum)

Web Chairs:
Theocharis Theocharides (Univ. of Cyprus)
Mike Borowczak (ErebusLabs)

International Liaison Chairs:
Ricardo Reis (UFRGS), Jiang Xu (UST)
Nikolas Sklavos (TEIWG), Susmita Sur-Kolay (ISI)

Registration Chair:
Vincent Kerzerho (CNRS-LIRMM)

Steering Committee Chair:
Nagarajan Ranganathan (USF)

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