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VLSI-SATA 2015 : International Conference on VLSI Systems, Architecture, Technology and Applications


When Jan 8, 2015 - Jan 10, 2015
Where Amrita Schhol of Engineering Bangalore
Submission Deadline Sep 29, 2014
Notification Due Oct 25, 2014
Final Version Due Nov 9, 2014
Categories    chip multiprocessors   VLSI   FPGA   embedded systems

Call For Papers

International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA 2015) will be held at the Amrita Viswa Vidyapeetham (University), School of Engineering, Bengaluru Campus during January 8-10, 2015. The conference will serve as an annual forum for researchers, academicians, and practitioners from around the world to present their current theoretical research efforts, system and design solutions and practical applications in VLSI.

The conference with a theme of “ System Solutions for Emerging Applications”, aims to provide a common platform for discussing broader VLSI topics to better understand the integration of VLSI systems and design for today's emerging applications.

VLSI-SATA 2015 will be a 3 day event that will include Day 1 devoted to tutorials, workshops and student research forum to provide a broader technical platform to discuss recent topics in VLSI. The aim of student research forum is to provide opportunity to foster student research and highlight student research accomplishments in VLSI. Day 2 and Day 3 will include key note speakers, general parallel technical sessions in four tracks of: Systems and Architecture, Design and Tools, Technology and Applications. Day 2 will also include an industrial track session. In addition, Day 2 and Day 3 will include industry exhibits from industrial sponsoring partners to the conference

Topics of interest include, but are not limited to, the following areas:

Multi / Many Core Architecture
Crypto VLSI Hardware and VLSI Hardware Security
System-on-Chip and Network-on-Chip
Video and Image Processing Applications
Heterogeneous Architectures and Models
Low Power VLSI Circuits
Embedded Systems
Computer-Aided Design (CAD)
Verification and Validation
FPGA/GPU Hybrid Computing and FPGA Based System Design
Hardware/Software Co-Design, Synthesis and Verification
Disruptive Technologies
VLSI Testing and Reliability
Energy-Efficient and Fault-Tolerance Design

Submissions must be original and should not have been published previously or be under consideration for any other publication while being evaluated for this conference. Papers electronically submitted in PDF should not exceed 6 pages (single-spaced, 2 columns, 10pt font).

Electronic submissions should be made at
Authors should use IEEE templates available at: for preparing camera-ready papers.All submitted papers will go through double blinded peer review process. Every accepted paper MUST have at least one full author registration and the paper has to be presented at the conference. Tutorials, workshops, student research forum and industry track sessions are also planned with individual deadlines for submission to be announced separately.IEEE technical co-sponsorship is pending.

Steering Committee Co-Chairs

Shikha Tripathi, Amrita University, Bengaluru Campus
T.S.B. Sudarshan, Amrita University, Bengaluru Campus
General Chair and Co-Chair

Chair-Tirumale Ramesh, Amrita University, Bengaluru Campus
Co-Chair-Nagesh Tamarapalli, AMD, Bengaluru
Technical Program Chair and Co-Chairs

Chair- S. Ravishankar, Amrita University, Bengaluru Campus
Co-Chair- N.S. Murty, Amrita University, Bengaluru Campus
Co-Chair, IEEE Bangalore Section Representative
Important Dates
Phase 1
Submission Deadline: August 25, 2014 (Closed)
Paper Acceptance Notification: September 26, 2014
Phase 2
Submission Deadline: September 29, 2014
Paper Acceptance Notification: November 25, 2014

Final Camera-Ready Manuscript:November 9, 2014
Deadline for Tutorials / Workshop Submission:October 10, 2014
Deadline for Student Research Forum Submission:October 10, 2014

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