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DDECS 2014 : IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems


Conference Series : Design and Diagnostics of Electronic Circuits and Systems
When Apr 23, 2014 - Apr 25, 2014
Where Warshaw, Poland
Submission Deadline Jan 12, 2014
Notification Due Mar 3, 2014
Final Version Due Mar 14, 2014
Categories    design   diagnostics   electronic   circuits

Call For Papers

The IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems provides a forum for exchanging ideas, discussing research results, and presenting practical applications in the areas of design, test, and diagnosis of electronic circuits and systems.

The DDECS Symposium series has been organized by these European countries: Czech
Republic (1997, 2002, 2006, 2009, 2013), Poland (1998, 2003, 2007), Slovakia (2
000, 2004, 2008), Hungary (2001, 2005), Austria (2010), Germany (2011) and Estonia (2012).

DDECS 2014 will take place in Warsaw, the home town of such celebrities as Marie Skłodowska-Curie and Frédéric Chopin. With its 78 universities, Warsaw hosts 270 thousand students. Over 700 thousand foreign tourists are attracted every year by Warsaw's cultural events of international renown (like National Theatres' Meeting and Jazz Jamboree), museums (including the National Museum and the Warsaw Rising Museum), and the Copernicus Science Centre promoting various domains of science with hundreds of its interactive exhibits. The Symposium is organized by the Institute of Microelectronics & Optoelectronics – Warsaw University of Technology, and sponsored by the Test Technology Technical Council (TTTC) ofthe IEEE Computer Society.

Topics of interest include but are not limited to:
- SoC and NoC Design and Test
- Design and Test in Nano-Technologies
- ASIC/FPGA Design
- Analog, Mixed-Signal, RF Design and Test
- Built-in Self-Test and Self-Repair
- ATE Hardware and Software
- Bio-Inspired Hardware
- Design for Testability and Diagnosis
- Design Verification/Validation
- On-line Testing
- Formal Methods in System Design
- Embedded Systems Testing
- Hardware/Software Co-Design
- Memory, Processor Testing
- IP-based Design
- MEMS Testing
- Logic Synthesis
- Physical Design
- Defect/Fault Tolerance and Reliability
- Dependable HW/SW Systems

Prospective authors are cordially invited to submit original papers using the electronic submission system at the Symposium web page. Papers in English with a length of 6 pages maximum in IEEE conference style are expected. Specialized student and industrial sessions, as well as embedded tutorials, will be organized at the symposium. Accepted papers will be included in the Symposium Proceedings and submitted for inclusion into IEEE Xplore as well as other Abstracting and Indexing (A&I) databases.

Important Dates:
Submission deadline: January 12th, 2014
Notification of acceptance: March 3rd, 2014
Camera-ready papers: March 16th, 2014

Further Information:
Witold Pleskacz
General Chair
The Institute of Microelectronics & Optoelectronics
Warsaw University of Technology
Koszykowa 75, 00-662
Warsaw, PL
Tel: +48-22-234-72-07

Michel Renovell
Program Chair
Laboratoire d'Informatique, de Robotique
et de Microélectronique de Montpellier (LIRMM)
161, Rue Ada, 34392 Montpellier Cedex 5, FR
Tel: +33 (0) 467 418 523
Email: renovell@lirmm.f

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