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HPRCTA 2008 : Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications


When Nov 17, 2008 - Nov 17, 2008
Where Austin, TX, USA
Submission Deadline Sep 15, 2008
Notification Due Oct 15, 2008
Final Version Due Nov 1, 2008
Categories    computer

Call For Papers

Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA'08)

Held in conjunction with SC08
Nov. 17, 2008
Austin, TX

High-performance reconfigurable computing (HPRC) based on the combination of conventional microprocessors and field-programmable gate arrays (FPGAs) is a rapidly evolving computing paradigm that offers the potential to accelerate computationally intensive scientific applications beyond what is possible on today's HPC systems. The academic community has been actively investigating this technology for the past decade, and the technology has proven itself to be practical for a number of HPC applications. Many HPC vendors are now offering or are planning to offer various HPRC solutions. The goal of this workshop, co-located with SC08, is to provide a forum for academic researchers and industry to discuss the latest trends and developments in the field, and to set a research agenda for the upcoming years on the use of FPGA technology in high-performance computing.

Important dates

Papers due: Sept. 15, 2008 -- firm deadline, cannot be extended!
Notification of acceptance: Oct. 15, 2008
Final camera-ready manuscripts due: Nov. 1, 2008
Workshop: Nov. 17, 2008

Program committee

Volodymyr Kindratenko (workshop co-chair), NCSA
Tarek El-Ghazawi (workshop co-chair), George Washington University
Dave Bennett, Xilinx
Duncan Buell, University of South Carolina
Roger Chamberlain, Washington University
Katherine Compton, University of Wisconsin-Madison
Aravind Dasu, Utah State
Matthias Fouquet-Lapar, SGI
Kris Gaj, George Mason University
Alan D. George, University of Florida
Maya Gokhale, Lawrence Livermore National Laboratory
Martin Herbordt, Boston University
Stefan Möhl, Mitrionics
Mark Parsons, Edinburgh Parallel Computing Centre
David Pellerin, Impulse
Gregory Peterson, University of Tennessee
Craig Petrie, Nallatech
Dan Poznanovic, SRC Computers
Melissa C. Smith, Clemson University
Eric Stahlberg, OpenFPGA
Craig Steffen, NCSA
Olaf Storaasli, Oak Ridge National Laboratory
Dave Strenski, Cray
Tom VanCourt, Altera

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