posted by user: andrewjm33 || 1512 views || tracked by 3 users: [display]

IET CDT Nano SI 2008 : IET Computers & Digital Techniques Special Issue on Advances in Nanoelectronics Circuits and Systems

FacebookTwitterLinkedInGoogle

Link: http://www.ietdl.org/IET-CDT
 
When N/A
Where N/A
Submission Deadline Oct 6, 2008
Categories    computers digital techniques   nanoelectronics   circuits   systems
 

Call For Papers

IET Computers and Digital Techniques is seeking original and unpublished papers for a special issue titled "Advances in Nanoelectronics Circuits and Systems" to be published in early 2009. Alternative nanoarchitectures, design-space exploration, and fault tolerance have emerged as major challenges for nanoscale technologies. Extremely high defect rates are being predicted for nanoscale fabrication processes, both for top-down mask-based manufacturing and bottom-up self-assembly. Consequently, there is a need for innovative design solutions, architectures, and test methods. Recent years have seen significant growth in research on these topics, and a number of different research irections are currently being explored. This trend will continue in the near future and even more innovative solutions for improving yield, density, and reliability are expected to emerge.

The aim of this special issue is to bring together researchers to share recent results on various aspects of nanoarchitectures and nanoscale circuit/system design, with coverage ranging from architectural perspectives on nanotechnologies, circuit and system modeling, fault-tolerant design, to design for testability. The special issue will foster further research, thereby leading to the emergence of creative ideas and practical solutions. Some specific topics of interest, but not limited to, are:

- Alternative architectures and circuit/system design for nanoscale technologies
- Fault-tolerant design and nanoarchitectures for existing and emerging technologies.
- Design techniques to enhance yield and reliability.
- Modeling techniques for different nanotechnology devices and systems
- Case studies.
- Fault models, testing, and design for testability

Important dates:
Manuscript submission: October 6, 2008
Completion of first round of reviews: January 15, 2009
Submission of revised manuscripts: March 1, 2009
Notification of Acceptance: April 15, 2009
Special Issue publication: June, 2009

Guest Editors:
Bipul C. Paul
Toshiba America Research
bpaul@tari.toshiba.com

Krishnendu Chakrabarty
Duke University, USA
krish@ee.duke.edu

To submit a paper please go to
http://mc.manuscriptcentral.com/iet-cdt
and follow link to "submit"

Related Resources

CSNDSP 2018   11th IEEE/IET International Symposium on COMMUNICATION SYSTEMS, NETWORKS & DIGITAL SIGNAL PROCESSING
SMC 2018   2018 IEEE International Conference on Systems, Man, and Cybernetics
Living in the Internet of Things 2018   Living in the Internet of Things: Cybersecurity of the IoT - A PETRAS, IoTUK & IET Event
ESSoS 2018   International Symposium on Engineering Secure Software and Systems
ISUAVs 2018   Second Call for Book Chapters: IET Imaging and Sensing for Unmanned Aerial Vehicles
JEDT 2018   International Journal of Electronic Design and Test
BaaS 2018   IET Biometrics Special Issue on Biometrics as-a-Service: Challenges and future perspectives
ICAIR 2018   2018 3rd International Conference on Artificial Intelligence and Robotics (ICAIR 2018)
ISCC 2018   IEEE International Symposium on Computers and Communications
IEEE ISNCC 2018   2018 IEEE International Symposium on Networks, Computers and Communications