posted by user: daneshtalab || 2199 views || tracked by 11 users: [display]

OCPNBS 2014 : On-Chip Parallel and Network-Based Systems

FacebookTwitterLinkedInGoogle

Link: http://www.pdp2014.org/specialsessions/ocpnbs/index.html
 
When Feb 12, 2014 - Feb 12, 2014
Where Turin, Italy
Submission Deadline Jul 31, 2013
Notification Due Oct 7, 2013
Final Version Due Oct 7, 2013
Categories    computer architecture   multicore systems   parallel processing   embedded systems
 

Call For Papers

On-chip parallel and network-based system design to achieve functionality with low energy-speed product requires larger device count SoC design, multi block function design methodology, architectures and energy evaluation schemes. Such systems, which are emerging as the architecture of choice for future high performance processors, require high performance interconnects which are necessary to satisfy the data supply needs of all cores. This session is dedicated to research on on-chip communication technology, architecture, design methods and applications, bringing together scientists and engineers working on on-chip innovations from related research communities, including parallel computer architecture, networking, and embedded systems. Original papers describing new and previously unpublished results are solicited on all aspects of on-chip parallel and networked system technology. Topics of interest include, but are not limited to:

- On-chip network architecture (topology, routing, arbitration, ...)
- Network design for 3D stacked logic and memory
- Processor allocation and scheduling in CMPs
- Mapping of applications onto NoCs
- NoC reliability issues
- OS and compiler support for NoCs
- Performance and power issues in NoCs
- Metrics, benchmarks, and trace analysis for NoCs
- Multi/many-core workload characterization & evaluation
- Modeling and simulation of on-chip parallel and networked systems
- Synthesis, verification, debug & test of SoCs
- NoC support for memory and cache access
- SoC and NoC design methodologies and tools
- Network support for SoC quality of service
- On-chip systems for FPGAs and structured ASICs
- NoC support for CMP/MPSoCs
- Floorplan-aware NoC architecture optimization
- Application-specific NoC design
- Networked SoC case studies
- On-chip parallel programming models
- Reconfigurable SoCs & NoCs
- Memory system design and optimizations for SoCs
- Early reports on system prototypes details
- SIMD parallel VLSI computing
- I/O interconnects and support for SoCs

Publication
Proceedings will be published by IEEE Computer Society in the same volume of the main track. Authors of accepted papers are expected to register and present their papers at the Conference. Conference proceedings will be indexed, among others, by IEEE explore, DBLP, Scopus ScienceDirect, and ISI Web of Knowledge.

Selected high-quality papers from the session will be considered to appear in Integration, the VLSI Journal.

Co-chairs
Hamid Sarbazi-Azad, Sharif University of Technology
Nader Bagherzadeh, UC-Irvine
Masoud Daneshtalab, University of Turku

Related Resources

ITCE 2019   The International Conference on Innovative Trends in Computer Engineering
IJCSA 2018   International Journal on Computational Science & Applications
PDP 2019   The 27th Euromicro International Conference on Parallel, Distributed and Network-Based Processing
MathSJ 2018   Applied Mathematics and Sciences: An International Journal
SPDNS 2019   Special Session Security in Parallel, Distributed and Network-Based Computing
EMC2 2019   Workshop On Energy Efficient Machine Learning And Cognitive Computing For Embedded Applications
SPDNS 2019   The Special Session Security in Parallel, Distributed and Network-Based Computing
ITCA 2019   7th International Conference of Information Technology, Control and Automation
RecSys 2019   13th ACM Conference on Recommender Systems
IPDPS 2019   33rd IEEE International Parallel & Distributed Processing Symposium