posted by user: daneshtalab || 2077 views || tracked by 11 users: [display]

OCPNBS 2014 : On-Chip Parallel and Network-Based Systems

FacebookTwitterLinkedInGoogle

Link: http://www.pdp2014.org/specialsessions/ocpnbs/index.html
 
When Feb 12, 2014 - Feb 12, 2014
Where Turin, Italy
Submission Deadline Jul 31, 2013
Notification Due Oct 7, 2013
Final Version Due Oct 7, 2013
Categories    computer architecture   multicore systems   parallel processing   embedded systems
 

Call For Papers

On-chip parallel and network-based system design to achieve functionality with low energy-speed product requires larger device count SoC design, multi block function design methodology, architectures and energy evaluation schemes. Such systems, which are emerging as the architecture of choice for future high performance processors, require high performance interconnects which are necessary to satisfy the data supply needs of all cores. This session is dedicated to research on on-chip communication technology, architecture, design methods and applications, bringing together scientists and engineers working on on-chip innovations from related research communities, including parallel computer architecture, networking, and embedded systems. Original papers describing new and previously unpublished results are solicited on all aspects of on-chip parallel and networked system technology. Topics of interest include, but are not limited to:

- On-chip network architecture (topology, routing, arbitration, ...)
- Network design for 3D stacked logic and memory
- Processor allocation and scheduling in CMPs
- Mapping of applications onto NoCs
- NoC reliability issues
- OS and compiler support for NoCs
- Performance and power issues in NoCs
- Metrics, benchmarks, and trace analysis for NoCs
- Multi/many-core workload characterization & evaluation
- Modeling and simulation of on-chip parallel and networked systems
- Synthesis, verification, debug & test of SoCs
- NoC support for memory and cache access
- SoC and NoC design methodologies and tools
- Network support for SoC quality of service
- On-chip systems for FPGAs and structured ASICs
- NoC support for CMP/MPSoCs
- Floorplan-aware NoC architecture optimization
- Application-specific NoC design
- Networked SoC case studies
- On-chip parallel programming models
- Reconfigurable SoCs & NoCs
- Memory system design and optimizations for SoCs
- Early reports on system prototypes details
- SIMD parallel VLSI computing
- I/O interconnects and support for SoCs

Publication
Proceedings will be published by IEEE Computer Society in the same volume of the main track. Authors of accepted papers are expected to register and present their papers at the Conference. Conference proceedings will be indexed, among others, by IEEE explore, DBLP, Scopus ScienceDirect, and ISI Web of Knowledge.

Selected high-quality papers from the session will be considered to appear in Integration, the VLSI Journal.

Co-chairs
Hamid Sarbazi-Azad, Sharif University of Technology
Nader Bagherzadeh, UC-Irvine
Masoud Daneshtalab, University of Turku

Related Resources

NPC 2018   The 15th Annual IFIP International Conference on Network and Parallel Computing
IJSCMC 2018   International Journal of Soft Computing, Mathematics and Control
ParBio 2018   7th International Workshop on Parallel and Cloud-based Bioinformatics and Biomedicine (ParBio)
HPCA 2019   The 25th International Symposium on High-Performance Computer Architecture
IPDPS 2018   32nd IEEE International Parallel and Distributed Processing Symposium
IJCCSA 2018   International Journal on Cloud Computing: Services and Architecture
ICPP 2018   International Conference on Parallel Processing
IJCTCM 2018   International Journal of Control Theory and Computer Modelling
ReCoSoC 2018   13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip
ACIIDS 2018   10th Asian Conference on Intelligent Information and Database Systems