MES 2016 : 4th ACM International Workshop on Manycore Embedded Systems
Call For Papers
Many-core embedded systems (MES) are moving towards the integration of hundreds of cores on a single chip and hold the promise of increasing performance through parallelism. As the number of cores integrated into a chip increases, the on-chip communication becomes a power and performance bottleneck in future MESs. On-chip network has been proposed as the most viable solution to meet the performance and design productivity requirements of the complex on-chip communication infrastructure. NoCs provide an infrastructure for better modularity, scalability, fault-tolerance, and higher bandwidth compared to traditional infrastructures. On the other hand, developing applications using the full power of MES requires software developers to transition from writing serial programs to writing parallel programs. On top of that, contemporary Operating Systems (OS) have been designed to run on a small number of reliable cores and are not able to scale up to hundreds of cores. Therefore, designing scalable and fault-tolerant OSs will be a tremendous challenge in future MESs.
As neuromorphic and mixed-signal architectures are emerging as an alternative solution beyond the conventional digital von Neumann machines for complex applications, we would like to highlight such emerging architectures in this workshop. In addition, we would like to emphasize on energy efficient (real-time) data processing in the realm of Big data and IoT applications through MESs.
The goal of this workshop is to bring together the researchers from academia and the experts from industry to present and discuss innovative ideas and solutions in the design, modeling, prototyping, programming, and implementation of MES. Topics of interest include, but are not limited to:
Real-time and mixed-criticality
3D Stacked Architectures
Synthesis, verification, debug & test
Performance and power issues
Prallel programming models and scalable software
Many-core as accelerators
Data-centers and supercomputers
Dynamic power management and energy harvesting
Submissions from EU projects in progress as well as seminal work in the field are also encouraged. Submissions should not exceed 8 pages, including tables and figures, and must be formatted in accordance to the ACM two column style. Submission of a paper should be regarded as an undertaking whereby, should the paper be accepted, at least one of the authors will register for the conference and present the work.
The proceeding will be published in the ACM Digital Library and Selected papers will be considered to appear in a special issue of the Elsevier's Microprocessors and Microsystems.
Instruction for Paper Submissions:
You are invited to submit original and unpublished research works on topics related to many-core embedded systems. Submitted papers must not have been published or simultaneously submitted elsewhere. Please submit a PDF copy of your full manuscript, not to exceed 8 double-column ACM formatted pages, and include up to 6 keywords and an abstract of no more than 400 words. Short papers (up to 4 pages) will also be accepted.
Papers must be formatted in accordance to the ACM two column style. ACM Word or LaTeX style templates are available here. In addition, Authors should apply ACM Computing Classification categories and terms.
Submit a PDF copy of your full manuscript to the Workshop EasyChair link at:
Submissions will go through a double-blind review process to evaluate all submitted papers. Author names as well as hints of identity are to be removed from the submitted paper.
Submission deadline: 15th March 2015
Notification of acceptance: 25th April 2015
Masoud Daneshtalab, KTH Royal Institute of Technology, Sweden
Maurizio Palesi, Kore University, Italy
Soeren Sonntag, Intel, Germany
Federico Angiolini, iNoCs & EPFL, Switzerland
Diana Goehringer, Ruhr-University Bochum, Germany
Masoumeh Ebrahimi, KTH Royal Institute of Technology, Sweden