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HiPEAC 2009 : The 4th International Conference on High Performance and Embedded Architectures and Compilers

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Conference Series : High Performance Embedded Architectures and Compilers
 
Link: http://www.hipeac.net/conference/
 
When Jan 25, 2008 - Jan 28, 2008
Where Paphos, CYPRUS
Abstract Registration Due Jul 4, 2008
Submission Deadline Jul 11, 2008
Notification Due Jun 17, 2008
Categories    computer architecture   embedded systems   programming languages
 

Call For Papers

The embedded market evolves rapidly, expanding the capabilities of each new device, and making the previous ones obsolete as technology advances. In order to achieve the high performance required by new embedded applications, these embedded processors are increasingly high performance processors, with an increasing overlap between general purpose and embedded processors. However, performance does not simply increase with technology advances, it is essential to find a way to translate technology into performance, and such is the role of the computer architect and compiler builder.

The HiPEAC conference provides a high quality forum for computer architects and compiler builders working in the field of high performance computer architecture and compilation for embedded systems, but is also open to general purpose research which is becoming increasingly relevant to the embedded domain. The conference aims at the dissemination of advanced scientific knowledge and the promotion of international contacts among scientists from academia and industry. Topics of interest include, but are not limited to:

* Single-core and Multi-core Processor architectures
* Architectures for mobile, networked, real-time and embedded systems
* Memory system optimization
* Power, temperature, performance and implementation efficient designs
* Interconnection networks, networks-on-chip, network interfaces and processors
* Security Processors
* Application specific processors and accelerators
* Reconfigurable architectures
* Dependable architectures
* Simulation and methodology
* Compiler techniques for embedded processors
* Feedback directed optimization
* Program characterization and analysis techniques
* Dynamic compilation, adaptive execution, and continuous profiling/optimization
* Backend code generation
* Binary translation/optimization
* Code size/memory footprint optimizations
* Automatic parallelization techniques
* Sequential and parallel programming models and tools
* Virtualization

Paper submission will be possible on this webpage.

HiPEAC also welcomes half or full day tutorial/workshop proposals. They should be submitted directly to the workshops/tutorials chair by May 30, 2008 and notification will be given on June 17.

Contact: hipeac2009@hipeac.net

Related Resources

HiPEAC 2019   High Performance Embedded Architectures and Compilers
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IJPLA 2018   International Journal of Programming Languages and Applications
LCPC 2018   The 31st International Workshop on Languages and Compilers for Parallel Computing
IJCSA 2018   International Journal on Computational Science & Applications
ACIIDS 2018   10th Asian Conference on Intelligent Information and Database Systems
MathSJ 2018   Applied Mathematics and Sciences: An International Journal
HPC 2019   High Performance Computing
CASES 2018   International Conference on Compilers, Architectures, and Synthesis for Embedded Systems