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FastPath 2013 : Second International Workshop on Performance Analysis of Workload Optimized Systems

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Link: http://www.ispass.org/ispass2013/fastpath2013
 
When Apr 21, 2013 - Apr 21, 2013
Where Austin, TX
Submission Deadline Mar 10, 2013
Notification Due Apr 1, 2013
Final Version Due Apr 11, 2013
Categories    performance   industry applications   computer architecture   modeling
 

Call For Papers

The goal of FastPath is to bring together researchers and practitioners involved in cross-stack hardware/software performance analysis, modeling, and evaluation of workload optimized systems.

With microprocessor clock speeds being held constant, optimizing systems around specific workloads is an increasingly attractive means to improve performance. The importance of workload optimized systems is seen in their ubiquitous deployment in diverse systems from cellphones to tablets to routers to game machines to Top500 supercomputers, and IT appliances such as IBM's DataPower and Netezza, and Oracle's Exadata.

More precisely, workload optimized systems have hardware and/or software specifically designed to run well for a particular application or application class. The types and components of workload optimized systems vary, but a partial list includes traditional CPUs assisted with accelerators (ASICs, FPGAs, GPUs), memory accelerators, I/O accelerators, hybrid systems, and IT appliances.

Exploiting CPU savings and speed-ups offered by workload optimized systems for application level performance improvement poses several cross stack hardware and software challenges. These include developing alternate programming models to exploit massive parallelism offered by accelerators, designing low-latency, high-throughput H/W-S/W interfaces, and developing techniques to efficiently map processing logic on hardware.

Topics
FastPath seeks to facilitate the exchange of ideas on performance analysis and evaluation of workload optimized systems and seeks papers on a wide range of topics including, but not limited to:


Workloads
Simulators
Industrial Experiences
GPUs, FPGAs, ASIC Accelerators
Game Consoles and their Sensors
RDMA and Infiniband
Measurements on accelerated systems
Analytical Techniques
Programming Models
MapReduce, Hadoop
Runtime Management Systems

Key Dates
Submission: March 10, 2013
Notification: April 1, 2013
Final Materials Due: April 11, 2013

Organizers
General Chair: Erik Altman (IBM)
Program Committee Chairs: Parijat Dube (IBM), Lizy K John (University of Texas at Austin)
Web Chair: Augusto Vega (IBM)
Publicity Chair: Mark Hempstead (Drexel University)

Program Committee
David Brooks (Harvard University)
Lieven Eeckhout (Ghent University)
Vuk Ercegovac (IBM)
Walid Najjar (University of California Riverside)
Arrvindh Shriraman (Simon Fraser University)
Satnam Singh (Google)
Peter Sweeney (IBM)
Lingja Tang (UCSD)
Craig Zilles (UIUC)

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