posted by user: daneshtalab || 2757 views || tracked by 8 users: [display]

TECS 2013 : Special Issue on Design Challenges for Many-core Processors - ACM Transactions on Embedded Computing Systems (TECS)

FacebookTwitterLinkedInGoogle

Link: http://acmtecs.acm.org/si/12/dcmp12.htm
 
When N/A
Where N/A
Submission Deadline Dec 1, 2012
Notification Due Mar 15, 2013
Final Version Due Sep 15, 2013
Categories    manycore   multicore   operating system   network on chip
 

Call For Papers

General Scope
Many-core processors are moving towards the integration of hundreds cores on a single chip and hold the promise of increasing performance through parallelism. As the number of cores integrated into a chip increases, the on-chip communication becomes power and performance bottleneck in future many-core processors. Network-on-Chip (NoC) architecture has been proposed as the most viable solution to meet the performance and design productivity requirements of the complex on-chip communication infrastructure. NoC provides an infrastructure for better modularity, scalability, fault-tolerance, and higher bandwidth compared to traditional infrastructures. On the other hand, developing applications using the full power of NoC-based many-core processors requires software developers to transition from writing serial programs to writing parallel programs. On top of that, for managing many-core resources, contemporary Operating Systems (OS) have been designed to run on a small number of reliable cores and are not able to scale up to hundreds of cores. Therefore, designing scalable and faultless OSs will be a tremendous challenge in future many-core processors.
The goal of this special issue is to present and discuss innovative ideas and solutions in the design, modeling, prototyping, programming, and implementation of many-core processors.
Topics of interest include but are not limited to:
• NoCs (routing, arbitration, switch architecture, etc.)
• Mapping of applications (static, dynamic, etc.)
• OS (centralized, distributed, scheduling, allocation, memory management, etc.)
• Reliability issues
• Physical design
• 3D stacked technology
• Synthesis, verification, debug & test
• Performance and power issues
• Reconfigurability aspects
• FPGA implementation
• Programming model and scalable software
• Compiler technologies
• Many-core as accelerators
• Many-core embedded systems
• Heterogeneity challenges
Submitted articles must not have been previously published or currently submitted for publication elsewhere. For work that has been published previously in a workshop or conference, it is required that submissions to the special issue have at least 40% new content. Submissions that do not meet this requirement will be rejected without review.

Guest Editors,
Masoud Daneshtalab, University of Turku, Finland (masoud.daneshtalab@utu.fi)
Maurizio Palesi, University of Enna, “Kore”, Italy (maurizio.palesi@unikore.it)
Juha Plosila, University of Turku, Finland (juha.plosila@utu.fi)

Related Resources

IEEE MCSoC 2019   IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip
HiPEAC 2020   15th International Conference on High Performance Embedded Architectures and Compilers
APPMM 2019   International Workshop on Advances in Parallel Programming Models and Frameworks for the Multi-/Many-core Era
ASAP 2019   The 30th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors
COINS-ST 2019   Special Sessions: Face Recognition | Blockchain for Internet of Things (IoT) | Cyber-physical Systems | Critical System Design | Stacking Many-core Systems and Architectures
SIGMETRICS 2019   ACM SIGMETRICS / IFIP PERFORMANCE 2019
KomIS@ACM-SAC 2019   ACM SAC 2019 - KomIS track: Application of AI and Big Data Analytics
POPL 2020   ACM SIGPLAN Symposium on Principles of Programming Languages 2020
KLP@SAC 2019   Knowledge and Language Processing Track @ The 34th ACM Symposium on Applied Computing - ACM SAC 2019
SoCC 2019   ACM Symposium on Cloud Computing