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VTS 2013 : IEEE 31st VLSI Test Symposium


Conference Series : VLSI Test Symposium
When Apr 29, 2013 - May 2, 2013
Where Berkeley, USA
Submission Deadline Oct 19, 2012
Notification Due Dec 21, 2012
Final Version Due Feb 21, 2013
Categories    VLSI

Call For Papers

The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in testing, debug and repair of microelectronic
circuits and systems. Major topics include, but are not limited to:

• Analog, Mixed-Signal & RF Test
• ATPG & Compression
• ATE Architecture & Software
• Built-In Self-Test (BIST)
• Defect & Current Based Test
• Defect/Fault Tolerance
• Delay & Performance Test
• Design for Testability (DFT)
• Design Verification/Validation
• Diagnosis and Debug
• Embedded System & Board Test
• Embedded Test Methods
• Emerging Technologies Test
• FPGA Test
• Fault Modeling and Simulation
• Hardware Security
• Low-Power IC Test
• Microsystems, MEMS and Sensor Test
• Memory Test and Repair
• On-Line Test & Error Correction
• Power and Thermal Issues in Test
• System-on-Chip (SOC) Test
• Test Standards
• Test Economics
• Test of Biomedical Devices
• Test of High-Speed I/O
• Test Quality and Reliability
• Test Resource Partitioning
• Transients and Soft Errors
• 2.5D, 3D and SiP Test

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