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ICCD 2012 : 30th IEEE International Conference on Computer Design


Conference Series : International Conference on Computer Design
When Sep 30, 2012 - Oct 3, 2012
Where Montreal, Canada
Abstract Registration Due May 4, 2012
Submission Deadline May 11, 2012
Notification Due Jul 23, 2012
Final Version Due Aug 10, 2012
Categories    computer engineering   computer architecture   circuits   testing

Call For Papers

The International Conference on Computer Design encompasses a wide range of topics in the research, design, and implementation of computer systems and their components. ICCD’s multi-disciplinary emphasis provides an ideal environment for developers and researchers to discuss practical and theoretical work covering system and computer architecture, test, verification and security, design and technology, and tools and methodologies.

The 2012 edition of the ICCD conference marks its 30TH ANNIVERSARY, where special sessions, keynotes, and other events will commemorate this milestone. ICCD is proud to be one of the venues with the oldest tradition in the area.

Manuscripts describing original work on any topic from the scope of ICCD are welcome. Authors are asked to submit technical papers in accordance to the author’s instructions in one of the following five conference tracks:

COMPUTER SYSTEMS AND APPLICATIONS. Advanced computer architecture for general and application-specific enhancement; Software design for embedded, mobile, general-purpose, cloud, and high-performance platforms; IP and platform-based designs; HW/SW codesign; Modeling and performance analysis; Support for security, languages and operating systems; Real-time systems; Application-specific and embedded software optimization; Compiler support for multithreaded and multi-core designs; Memory system and network system optimization; On-chip and system-area networks; Support for communication and synchronization (e.g., transactional memory).

PROCESSOR ARCHITECTURE. Microarchitecture design techniques for uni- and multi-core processors: instruction-level parallelism, pipelining, caching, branch prediction, multithreading; Techniques for low-power, secure, and reliable processors; Embedded, network, graphic, system-on-chip, application-specific and digital signal processor design; Hardware support for processor virtualization; Real-life design challenges: case studies, tradeoffs and post-mortems.

LOGIC AND CIRCUIT DESIGN. Circuits and design techniques for digital, memory, analog and mixed-signal systems; Circuits and design techniques for high performance and low power; Circuits and design techniques for robustness under process variability and radiation; Design techniques for emerging process technologies (MEMs, spintronics nano, quantum); Asynchronous circuits; Signal processing, graphic processor and arithmetic circuits.

ELECTRONIC DESIGN AUTOMATION. High-level, logic and physical synthesis. Physical planning, design and early estimation for large circuits; Automatic analysis and optimization of timing, power and noise; Tools for multiple-clock domains, asynchronous and mixed timing methodologies; CAD support for FPGAs, ASSPs, structured ASICs, platform-based design and NOC; DfM and OPC methodologies; System-level design and synthesis; Tools and design methods for emerging technologies (MEMs, spintronics, nano, quantum).

TEST, VERIFICATION AND SECURITY. Design error debug and diagnosis; Fault modeling; Fault simulation and ATPG; Fault tolerance; DFT and BIST. Functional, transaction-level, RTL, and gate-level modeling and verification of hardware designs; Equivalence checking, property checking, and theorem proving; Constrained-random test generation; High-level design and SoC validation. Hardware security primitives; Side channel analysis; Logic and microarchitectural countermeasures; Interaction between VLSI test and trust.

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