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HOTI 2011 : IEEE 19th Annual Symposium on High-Performance Interconnects


Conference Series : High Performance Interconnects
When Aug 24, 2011 - Aug 26, 2011
Where Santa Clara, USA
Submission Deadline Apr 30, 2011
Notification Due Jun 11, 2011
Final Version Due Jul 4, 2011
Categories    networking

Call For Papers

Hot Interconnects is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from multi-core on-chip interconnects to those within systems, clusters, data centers, and cloud facilities. Leaders in industry and academia attend the conference to interact with individuals at the forefront of this field. This yearly conference is very well attended by leaders in industry and academia. The atmosphere provides for a wealth of opportunities to interact with individuals at the forefront of this field.

Themes include cross-cutting issues spanning computer systems, networking technologies, and communication protocols for high-performance interconnection networks. This conference is directed particularly at new and exciting technology and product innovations in these areas. Contributions should focus on real experimental systems, prototypes, or leading-edge products and their performance evaluation. In addition to those subscribing to the main theme of the conference, contributions are also solicited in the topics listed below. The best papers of Hot Interconnects 2011 will be published in a special issue of IEEE Micro.

Building on last year's successful technical program, keynotes, sessions, and panels on datacenter networking and their requirements, and solutions, in 2011 Hot Interconnects moves to the Intel World Headquarters, Santa Clara, CA for the conference. This year's conference focusses on data-center, virtualized, and cloud networking. We hope you can join us there.


Novel and innovative interconnect architectures
Multi-core processor interconnects
System-on-Chip Interconnects
Advanced chip-to-chip communication technologies
Optical interconnects
Protocol and interfaces for inter-processor communication
Survivability and fault-tolerance of interconnects
High-speed packet processing engines and network processors
System and storage area network architectures and protocols
High-performance host-network interface architectures
High-bandwidth and low-latency I/O
Tb/s switching and routing technologies
Innovative architectures for supporting collective communication
Novel communication architectures to support grid computing
Centralized and distributed cloud interconnects
Requirements driving high-performance interconnects
Traffic characterization for HPC systems and commercial data centers

Submission Guidelines

Submission deadline: April 30, 2011
Notification of acceptance: June 11, 2011
Papers need sufficient technical detail to judge quality and suitability for presentation. Paper limit: 8 pages, two columns
Submit title, author, abstract, and full paper (8 pages, double-column, IEEE format)
Papers should be submitted electronically through EasyChair:

About the conference

Conference held on August 24-25 2011 at Intel World Headquarters, Santa Clara, CA
Papers selected will be published in proceedings by the IEEE Computer Society
Presentations are 30-minute talks in a single-track format
Online information at

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