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SILM 2022 : Workshop on the Security of Software / Hardware Interfaces


When Jun 6, 2022 - Jun 6, 2022
Where Genoa
Submission Deadline Mar 18, 2022
Notification Due Apr 8, 2022
Final Version Due Apr 15, 2022
Categories    computer science   computer engineering   security

Call For Papers


Call for Paper

SILM Workshop on Software/Hardware Security
Co-located with Euro S&P 2022:

Monday, June 06 2022, Genoa (Italy)


It is becoming increasingly important to combine software and hardware
aspects to take new software attacks into account. For example, hardware
vulnerabilities such as Spectre or Meltdown can be exploited purely by
software attacks. Such attacks can be executed remotely and do not require
physical access to the targeted hardware platform. On the other hand,
hardware features can be used to better detect and respond to traditional
software attacks, such as memory corruption. Therefore, it is necessary to
study the security of software/hardware interfaces, both in terms of
attacks and defenses.

The purpose of the SILM workshop is to share experiences, tools, and
methodologies to handle security in software/hardware interfaces. On the
one hand, we need to better assess the security guarantees provided by
existing hardware architectures against software attacks, especially
attacks against micro-architecture. This can be achieved by identifying new
vulnerabilities using reverse engineering, fuzzing, or other attack
approaches. On the other hand, we also need to propose new architectures
offering better resilience against software attacks. These architectures
should rely on hardware-based security mechanisms to protect the software
stack. One of the challenges is to formally specify and verify the security
guarantees offered by such architectures.

The goal of this third edition of the SILM workshop is to provide a forum
for researchers and practitioners from academia, industry, and government
that work on the security of software/hardware interfaces.

==== Topics of interest include, but are not limited to the following

* Hardware reverse engineering
* Microcode security analyses
* Software side-channel attacks
* Software attacks against micro-architecture
* Software-activated fault attacks
* Hardware-based security mechanisms
* Software counter-measures against hardware vulnerabilities
* Formal methods applied to the security of software/hardware interfaces
* Hardware enclaves
* Hardware trace mechanisms for security
* OS and VM introspection

==== Important Dates

- Submission: March 18, 2022 -- 11:59pm AoE
- Author Notification: April 08, 2022
- Camera Ready Version: April 15, 2022
- Workshop: June 06, 2022

==== Submission and Publication

There are two categories of submissions:

1. Regular papers describing fully developed work and complete results (10
pages, references included, IEEE format)

2. Short papers, position papers, industry experience reports, work-in-
progress submissions and ideas (6 pages, references included, IEEE format;
work-in-progress and idea submissions should clearly outline research
hypothesis, evaluation strategy and potential impact)

All papers should be in English and describe original work that has not
been published or submitted elsewhere. The submission category should be
clearly indicated. All submissions will be fully reviewed by members of the
Program Committee. Papers will appear in IEEE Xplore in a companion volume
to the regular EuroS&P proceedings; contact the Program Chairs if you do
not want your *short paper* to appear in the proceedings.

==== Program Chairs

- Guillaume Hiet, IRISA, CentraleSupelec/Inria, France
- Jan Tobias Mühlberg, DistriNet, KU Leuven, Belgium

==== Program Committee

- Pascal Cotret, ENSTA Bretagne
- Chris Dalton, HP Labs
- Lesly-Ann Daniel, KU Leuven
- Karine Heydemann, LIP6
- Guillaume Hiet, CentraleSupélec/Inria (Co-Chair)
- Vianney Lapôtre, Univ. South Brittany
- Jan Tobias Mühlberg, KU Leuven (Co-Chair)
- Cristofaro Mune, Raelize B.V.
- Simon Rokicki, ENS Rennes
- Volker Stolz, HVL
- Marcus Voelp, Uni Luxembourgh
- Pierre Wilke, CentraleSupélec/Inria
- Yuval Yarom, University of Adelaide and Data61

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