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SILM 2021 : 3rd Workshop on the Security of Software / Hardware Interfaces


When Sep 6, 2021 - Sep 6, 2021
Where Online event
Submission Deadline Jun 4, 2021
Notification Due Jul 2, 2021
Final Version Due Jul 16, 2021
Categories    computer science   computer engineering   security

Call For Papers


Call for Paper

SILM Workshop on Software/Hardware Security

September 6, 2021
All-digital event


Co-located with Euro S&P 2021:
EuroS&P 2021 and SILM 2021 will this year be held as online events.

It is becoming increasingly important to combine software and hardware
aspects in order to take into account new software attacks. For example,
hardware vulnerabilities such as Spectre or Meltdown can be exploited by
purely software attacks. Such attacks can be executed remotely and do not
require physical access to the targeted hardware platform. On the other
hand, hardware features can be used to better detect and respond to
traditional software attacks, such as memory corruption. It is therefore
necessary to study in depth the security of software/hardware interfaces,
both in terms of attacks and defences.

The purpose of the SILM workshop is to share experiences, tools, and
methodologies to handle security in software/hardware interfaces. On one
hand, we need to better assess the security guarantees provided by existing
hardware architectures against software attacks, especially attacks against
micro-architecture. This can be achieved by identifying new vulnerabilities
using reverse engineering, fuzzing or other attack approaches. On the other
hand, we also need to propose new architectures offering better resilience
against software attacks. These architectures should rely on hardware-based
security mechanisms to protect the software stack. One of the challenges is
to formally specify and verify the security guarantees offered by such

The goal of this third edition of the SILM workshop is to provide a forum
for researchers and practitioners from academia, industry, and government
that work on the security of software/hardware interfaces.

==== Topics of interest include, but are not limited to the following.

* Hardware reverse engineering
* Microcode security analyses
* Software side-channel attacks
* Software attacks against micro-architecture
* Software-activated fault attacks
* Hardware-based security mechanisms
* Software counter-measures against hardware vulnerabilities
* Formal methods applied to the security of software/hardware interfaces
* Hardware enclaves
* Hardware trace mechanisms for security
* OS and VM introspection

==== Important Deadlines:

- Submission: June 4, 2021 - 11:59pm AoE
- Author Notification: July 2, 2021
- Camera Ready Version: July 16, 2021
- Workshop: September 6, 2021

==== Submission and publication

There are two categories of submissions:

1. Regular papers describing fully developed work and complete results (10
pages, references included, IEEE format)

2. Short papers, position papers, industry experience reports, work-in-
progress submissions and ideas (6 pages, references included, IEEE format;
work-in-progress and idea submissions should clearly outline research
hypothesis, evaluation strategy and potential impact)

All papers should be in English and describe original work that has not
been published or submitted elsewhere. The submission category should be
clearly indicated. All submissions will be fully reviewed by members of the
Program Committee. Papers will appear in IEEE Xplore in a companion volume
to the regular EuroS&P proceedings.

==== Program Chairs

- Guillaume Hiet, IRISA, CentraleSupelec/Inria
- Jan Tobias Mühlberg, DistriNet, KU Leuven

==== Program Committee

- Guillaume Bouffard, ANSSI
- Pascal Cotret, ENSTA Bretagne
- Damien Couroussé, CEA
- Chris Dalton, HP Labs
- Lucas Davi, University of Duisburg-Essen
- Karine Heydemann, LIP6
- Guillaume Hiet, CentraleSupélec/Inria (Chair)
- Vianney Lapôtre, Univ. South Brittany
- Ronan Lashermes, Inria
- Jan Tobias Mühlberg, DistriNet, KU Leuven (Co-Chair)
- Cristofaro Mune, Raelize B.V.
- Kaveh Razavi, ETH Zürich
- Erven Rohou, Inria
- Simon Rokicki, ENS Rennes
- Volker Stolz, HVL
- Pierre Wilke, CentraleSupélec/Inria
- Yuval Yarom, University of Adelaide and Data61

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