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APED 2011 : 2nd Asia-Pacific Conference on Power Electronics and Design

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Link: http://www.ier-institute.org/aped/
 
When Oct 8, 2011 - Oct 9, 2011
Where Ulan Bator, Mongolia
Submission Deadline Jun 15, 2011
Notification Due Jul 15, 2011
Final Version Due Aug 15, 2011
Categories    power   electronics
 

Call For Papers

Please submit Papers based on research / practical experience (Industry Track). Topics of interest include, but are not limited to:

1.1. Technologies and Digital Circuits
Emerging logic & memory technologies and applications,
Device design, Low power low leakage circuits,
Memory circuits, Cooling technologies, Battery
technologies, Variation-tolerant design, Temperatureaware and reliable design

1.2. Design Tools
Energy simulation and estimation tools that operate at
the circuit/gate level, RT level, behavioral level, and
algorithmic level, Variation-aware design, Physical design and interconnects

1.3. Logic and Microarchitecture Design
Processor core design, Cache design, Logic and RTL
design, Arithmetic and signal processing circuits,
Encryption technologies, Asynchronous design

1.4. System Design and Methodologies
Microprocessor, DSP and embedded systems design,
FPGA and ASIC designs , Emerging applications,
Server thermal management, System level power
management, Behavioral and system level design aids

1.5. Analog, MEMS and Mixed Signal Electronics
RF circuits, Wireless, MEMS circuits, AD/DA
Converters, Mixed-signal circuits, DC-DC conversion

1.6. Software Design and Optimization
Power aware compiler and operating system design,
Application level optimizations, Wireless and sensor networks

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