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HEART 2011 : Highly Efficient Accelerators and Reconfigurable Technologies


When Jun 2, 2011 - Jun 3, 2011
Where London, UK
Submission Deadline Mar 14, 2011
Notification Due Apr 25, 2011
Final Version Due May 9, 2011
Categories    high performance computing   power performance   cad design tools   gpu, fpga and other devices

Call For Papers


The 2nd International Workshop on
Highly Efficient Accelerators and Reconfigurable Technologies
-- HEART2011 --
Imperial College, London, UK, June 2-3, 2011

We cordially invite you to join us at the 2nd International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 2011,, a forum to present and discuss the latest research and developments in accelerators and reconfigurable technologies for high-performance efficient computing.

Early registration rate is still open! You can register to attend HEART 2011 by following this link:

HEART 2011 offers a great program this year, with the following highlights:

- Two invited keynote speeches, the first from Prof. Miriam Leeser, Northeastern University, USA, on the Challenges of writing portable, correct and high performance libraries for GPUs, and the second from Dr. Oliver Pell, Vice-president, Maxeler Technologies, UK, on surviving the end of frequency scaling with reconfigurable dataflow computing

- 8 technical sessions with a wide range of topics including systems and tools for high performance efficient computing, novel architectures, and FPGA/GPU-based HPC applications.

The full program can found here:

We look forward to welcoming you at HEART 2011 in London!

Workshop co-chairs:
Hideharu Amano, Keio University, JP
Wayne Luk, Imperial College London, UK

Program co-chairs:
Khaled Benkrid, University of Edinburgh, UK
Martin Herbordt, Boston University, USA
Yoshiki Yamaguchi, University of Tsukuba, JP

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