ReVVerT 2011 : ICST Workshop on Requirements and Validation, Verification & Testing
Call For Papers
NB! Date is at the time of writing not certain. Will be one day between 21st and 25th of March 2011.
1st Workshop on Requirements and Validation, Verification & Testing
Co-located with ICST 2011
*** Call for Papers ***
Verification and validation are important means to measure and guarantee the quality of systems. There are many existing and upcoming standards (IEC 61508, ISO 26262, DO-178B/C) that demand high quality of safety-related systems and the proof of it. Alone but also in combination with model-based approaches, this research area attracts a lot of interest in academia and in the industry.
All development projects are based on capturing requirements. The quality of the following activities in the development process, like design, verification, implementation, and testing, highly depends on the quality of the requirements (as defined in IEEE 830). Capturing good requirements and integrating them into the development process is an important issue.
The goal of this workshop is to discuss and identify the intersections and mutual leverages of both topics. We want to discuss questions like "How can we achieve complete, clear and testable requirements?", "How to verify requirements?", "How can we use requirements for validation and verification of systems?", "How to trace between requirements and other development artifacts?", etc.
*** Topics of ReVVerT ***
The workshop on requirements and validation, verification & Testing (ReVVerT) in 2011 has the objective to offer a forum for researchers and practitioners who are working on Requirements Engineering (RE) and Validation, Verification & Testing (V&V). The main goals of the workshop are to identify, discuss, and elaborate mutual impacts of RE and V&V.
The major questions about RE and V&V concern possible overlappings and mutual benefits for both techniques: How can V&V improve RE and how can V&V leverage the techniques around RE? How can we achieve complete, clear and testable requirements?, How to verify requirements?, How can we use requirements for validation and verification of systems?, How to trace between requirements and other development artifacts?
In order to discuss these and further similar questions, we would like to invite submissions related to the following topics:
* V&V of requirements (are requirements complete, consistent, ...)
* Testability in requirements engineering
* Definition of formal acceptance criteria
* Requirements clustering
* V&V for requirements implementation (do the SUT and test suites implement / test all requirements? What coverage is reached?)
* Requirements-based testing
* Testing of non-functional requirements
* Change management for requirements and V&V
* Bridging the gap between requirements and testing
* Test case generation from informal requirements documents
* Traceability between requirements and testing
* Traceability between requirements and the system or the model
* Impact analysis on test cases in case of requirements change
* Requirements-based test exit criteria
* Test oracles based on requirements
* Requirements for the test process and V&V
* Requirements management and testing
** Submissions and Publication **
All accepted papers will be published in the IEEE digital library.
** Workshop Format **
ReVVerT 2011 will include paper presentations and discussions.
We explicitely invite to submit research papers and industrial experience papers (each 6 page IEEE, two columns) and discussion proposals for a discussion session (1 page IEEE, two columns).
** Important Dates **
Submission (strict): December 21, 2010 (MDT)
Author notification: February 1, 2011
Final version: February 15, 2011
Workshop: March 21-25, 2011 (one day)
** Program Committee **
Paul Ammann (George Mason University, USA)
Benoit Baudry (IRISA, France)
Antonia Bertolino (CNR / ISTI, Italy)
Gregor Engels (University of Paderborn / s-lab, Germany)
Mario Friske (QMETHODS, Germany)
Helmuth Götz (Siemens Corporate Technology, Germany)
Daniel Méndez Fernández (TU Munich, Germany)
Michael Mlynarski (s-lab / University of Paderborn, Germany)
Andrea Herrmann (Axivion GmbH, Germany)
Jochen Küster (IBM Zurich, Switzerland)
Irwin Kwan (University of Victoria, British Columbia, Canada)
Bruno Legeard (Smartesting, France)
Oscar Pastor (Universitat de Valencia, Spain)
Klaus Pohl (University Duisburg-Essen, Germany)
Ina Schieferdecker (Fraunhofer FOKUS / TU Berlin, Germany)
Holger Schlingloff (Fraunhofer FIRST / HU Berlin, Germany)
Harry Sneed (Anecon, Austria)
** Organization Committee **
Stephan Weißleder (Fraunhofer FIRST, Germany)
Baris Güldali (s-lab / University of Paderborn, Germany)
Sebastian Oster (TU Darmstadt, Germany)