## Workshop Scope and Goals

The computing landscape is undergoing unprecedented transformation and heterogeneous systems the new standard.
Driven by critical demands for enhanced energy efficiency, memory capacity, and computational throughput, modern architectures are evolving at every level.
Traditional homogeneous designs can no longer meet today's demands of computational throughput, memory bandwidth, and energy efficiency.

Heterogeneous computing harnesses diverse processing units and memory technologies within hierarchical systems to accelerate varied applications.
Fields ranging from AI and big data to cloud computing, edge computing, real-time systems, and high-performance computing have achieved significant gains through heterogeneous architectures.
Additionally, emerging dataflow-based accelerators that depart from traditional von Neumann architecture promise both new challenges and opportunities.

These new heterogeneous architectures demand new applications and programming models to fully utilize their capabilities.
This workshop examines heterogeneous design implications across the entire computing stack - from hardware and compiler optimizations to application development and programming environments.
It seeks to ground heterogeneous system design research through studies of application kernels and/or whole applications, as well as shed light on new tools, libraries, and runtime systems that improve the performance and productivity of applications on heterogeneous systems.

The goal of this workshop is to bring together researchers and practitioners who are at the forefront of heterogeneous computing to learn the opportunities and challenges in future heterogeneous system design trends and thus help influence the next trends in this area.
Topics of interest include (but are not limited to):

## Applications and Workloads
* Applications leveraging GPUs, FPGAs, TPUs, DPUs, on-chip accelerators, or other novel architectures.
* AI/ML workloads including generative AI training/inference (e.g. LLMs, LDMs), recommendation systems and AI for * science and engineering
* Scientific and engineering applications
* Big data and cloud computing workloads
* Edge computing and real-time applications
* Application behavior characterization and performance analysis
* Domain-specific applications and benchmarks

## Systems Architecture and Design
* Heterogeneous system architectures (ARM, RISC-V, custom extensions)
* Memory hierarchies and novel memory systems
* Energy efficiency and thermal considerations
* Security and reliability in heterogeneous systems
* Design space exploration and trade-off analysis
* Performance modeling and prediction
* Emerging accelerator architectures (dataflow, neuromorphic, etc.)

## Programming Models and Development Tools
* High-level programming models (OpenMP, OpenACC, SYCL, OneAPI, Kokkos, Raja)
* Low-level programming interfaces (OpenCL, CUDA)
* Debugging and profiling tools
* Performance optimization and autotuning frameworks
* Testing and verification methods for heterogeneous systems
* Workload characterization tools
* Benchmarking suites and methodologies
* Heterogeneous System Software and Runtime Systems
* Compiler optimizations for heterogeneous systems

## Runtime systems and resource management
* Operating system support for heterogeneous computing
* Virtualization and containerization for heterogeneous systems
* Task scheduling and load balancing
* Memory management and data movement optimization
* System-level monitoring and telemetry
* Integration of heterogeneous components and interfaces
* Communication software/middleware for heterogeneous systems

## Paper Tracks:

There are two paper tracks available for AsHES’25:
1) Full paper track (10 pages) including citations;
2) Short paper track (maximum of 4 pages) including citations; meant to highlight early investigations of innovative ideas.
Submitted papers will undergo a single-blind review process, so the authors do not need to anonymize a submission.


## Important dates
* Paper Submission: January 23, 2026 (Friday) (then delayed by one week to January 30)
* Paper Notification: February 21, 2026 (Friday)
* Camera-ready Deadline: March 6th, 2026 (Friday)
* Best-paper award
* The best paper will receive a certificate of recognition. This award will be given based on the paper's originality, impact, and overall quality.