UCHPC: UnConventional High Performance Computing



Past:   Proceedings on DBLP

Future:  Post a CFP for 2018 or later   |   Invite the Organizers Email


All CFPs on WikiCFP

Event When Where Deadline
UCHPC 2017 The 10th Workshop on UnConventional High Performance Computing 2017
Aug 28, 2017 - Aug 29, 2017 Santiago de Compostela, Spain May 5, 2017
UCHPC 2016 9th Workshop on UnConventional High Performance Computing 2016
Aug 22, 2016 - Aug 23, 2016 Grenoble, France May 6, 2016
UCHPC 2015 8th Workshop on UnConventional High Performance Computing 2015
Aug 24, 2015 - Aug 25, 2015 Vienna, Austria May 22, 2015
UCHPC 2014 7th Workshop on UnConventional High Performance Computing 2014
Aug 25, 2014 - Aug 26, 2014 Porto, Portugal May 30, 2014
UCHPC 2013 6th Workshop on UnConventional High Performance Computing 2013
Aug 27, 2013 - Aug 28, 2013 Aachen, Germany May 31, 2013
UCHPC 2012 Ffifth Workshop on UnConventional High Performance Computing 2012
Aug 27, 2012 - Aug 28, 2012 Rhodes Island, Greece Jun 4, 2012
UCHPC 2011 Forth Workshop on UnConventional High Performance Computing 2011
Aug 29, 2011 - Aug 29, 2011 Bordeaux, France Jun 12, 2011
UCHPC 2010 Third Workshop on UnConventional High Performance Computing
Aug 31, 2010 - Sep 1, 2010 Ischia - Naples, Italy Jun 14, 2010

Present CFP : 2017


The 10th Workshop on
UnConventional High Performance Computing 2017
(UCHPC 2017)

August 28/29, 2017, Santiago de Compostela, Spain

held in conjunction with
Euro-Par 2017, August 28 - September 1, 2017
Santiago de Compostela, Spain



Recent issues with the power consumption of conventional HPC hardware
results in both new interest in accelerator hardware and in usage of
mass-market hardware originally not designed for HPC. The most prominent
examples are GPUs, but FPGAs, DSPs and embedded designs are also possible
candidates to provide higher power efficiency, as they are used in
energy-restriced environments, such as smartphones or tablets. The
so-called "dark silicon" forecast, i.e. not all transistors may be
active at the same time, may lead to even more specialized hardware in
future mass-market products. Exploiting this hardware for HPC can be a
worthwhile challenge.

As the word "UnConventional" in the title suggests, the workshop focuses
on hardware or platforms used for HPC, which were not intended for HPC
in the first place. Reasons could be raw computing power, good
performance per watt, or low cost in general. To address this
unconventional hardware, often, new programming approaches and
paradigms are required to make best use of it. A second focus of
the workshop is on innovative, (yet) unconventional new programming

To this end, UCHPC tries to capture solutions for HPC which are
unconventional today but could become conventional and significant tomorrow,
and thus provide a glimpse into the eventual future of HPC.


The goal of this workshop is to present research exploring currently
unconventional techniques for HPC and their benefits. UCHPC also covers
according programming models, compiler techniques, and tools. Thus,
suggested topics for papers include, but are not limited to the following:

* Innovative use of hardware and software unconventional for HPC
* HPC applications or visualizations in connection with HPC on GPUs
(GPGPU), using GPUs embedded on processor dies (as found in AMD
Fusion/APUs, NVidia Denver, Intel Ivy Bridge), Intel's MIC and SCC,
low power/embedded processors (including DSPs, Adapteva Epiphany),
FPGAs (e.g. Convey), Tilera's tile-based many-core processors,
Processing in Memory (PIM), accelerators, etc.
* Cluster/Grid solutions using unconventional hardware, e.g. clusters of
game consoles, nodes using GPUs, Low Power/Embedded Processors,
MPSoCs, new many-cores from Intel and/or ARM designs, Mac
Minis/AppleTVs, FPGAs etc.
* Heterogeneous computing on hybrid platforms
* Work on and use of new programming models and paradigms needed to
support unconventional hardware, and hybrid/hierarchical combinations
with more conventional systems. Examples are OpenACC, OpenCL, Cilk+,
and task-based approaches for heterogeneous systems
* Performance and scalability studies in HPC using unconventional
* Reconfigurable computing for HPC
* Performance modeling, analysis and tools for HPC with unconventional
* (Yet) unconventional programming models for HPC, including PGAS,
task-based or data-flow concepts, as well as supporting tools
* Big data and/or deep learning using unconventional HPC hardware or
* Mapping problem specifications onto heterogenenous architectures

Best Paper Award

As in recent years, we will give out a best paper award. For the winner,
we have a special (unconventional) hardware price.

Paper Submission, Registration, and Publication

Submissions in PDF format should be between 10 – 12 pages in
the Springer LNCS style, which can be downloaded from the Springer Web
site. The 12 pages limit is a hard limit. It includes everything
(text, figures, references). On acceptance, at least one author is
required to register for workshop attendance at Euro-Par 2017 and
present the paper in the workshop.

Workshop papers must not exceed 12 single-spaced, single-column pages
in LNCS proceedings style. Submission implies that at least one author
will register for the workshops at Euro-Par 2017 and present the paper
in the workshop session, if accepted.

Upload your PDF to the Euro-Par 2017 Workshop submission server, track
"UCHPC - UnConventional High Performance Computing" at


It must not be simultaneously submitted to the main conference or any
other publication outlet.

For the workshop, we will prepare handouts with the revised papers.
These will be published after the conference in the workshop
proceedings of Euro-Par 2017, part of the LNCS series of Springer.

Important Dates

May 5, 2017 : Submission deadline
June 16, 2017 : Notification of acceptance
July 21, 2017 : Camera ready, revised papers due

UCHPC'17 International Program Committee

(see our website for updates)

Michael Bader, Technische Universität München, DE
Alex Bartzas, National Technical University of Athens, GR
Denis Barthou, University of Bordeaux, FR
Michaela Blott, Xilinx, IRL
Jens Breitbart, Bosch, DE
Karl Fuerlinger, Ludwig-Maximilians-Universität München, DE
Frank Hannig, University of Erlangen-Nuremberg, DE
Anders Hast, Uppsala University, SE
Gaurav Khanna, University of Massachusetts Dartmouth, US
Stefan Lankes, RWTH Aachen, DE
Manfred Mücke, Materials Center Leoben, AT
Yannis Papaefstathiou, Technical University of Crete, GR
Bertil Schmidt, Johannes Gutenberg University Mainz, DE
Carsten Trinitis, Technische Universität München, DE
Josef Weidendorfer, Technische Universität München, DE
Jan-Phillipp Weiss, COMSOL, SE
Peter Zinterhof, University of Salzburg, AT

UCHPC'17 Steering Committee

Jens Breitbart, Bosch Driver Assistance, DE
Anders Hast, Uppsala University, SE
Jan-Philipp Weiss, COMSOL, SE
Josef Weidendorfer, Technische Universität München, DE
Ren Wu, CN

UCHPC'17 Workshop Organizers

Jens Breitbart, Bosch Driver Assistance, DE
Josef Weidendorfer, Technische Universität München, DE

Further Information

See the UCHPC'17 website at http://uchpc.lrr.in.tum.de/17

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