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Present CFP : 2016
Since 1969, the ARITH symposia have served as the flagship conference for presenting scientific work on the latest research in computer arithmetic. Authors are invited to submit papers describing recent advances on all aspects of computer arithmetic and its applications or implementations. This includes, but is not restricted to, the following topics:
Foundations of number systems and arithmetic
Arithmetic processor design and implementation
Arithmetic algorithms and their analysis
HPC: Highly-parallel arithmetic, exascale computing, reproducibility
Floating-point units, algorithms, and numerical analysis
Elementary and special function implementations
Power-efficient or low-energy arithmetic units and processors
Industrial implementation of arithmetic units and processors
Test, validation, and formal verification techniques for arithmetic implementations
New approaches to fault/error-tolerance in arithmetic implementations
Arithmetic for FPGAs and reconfigurable logic
Design automation for computer arithmetic implementations
Computer arithmetic for security and cryptography
Arithmetic to enhance accuracy or reliability (multiple-precision, interval arithmetic…)
Arithmetic for specific application domains (convolutional neural networks, deep learning, signal processing, computer graphics, multimedia, computer vision, finance…)
Computer arithmetic algorithms and implementation for emerging technologies
Non-conventional computer arithmetic and applications
Procedure for submission
Authors should submit the abstract of the paper no later than October 21st, 2015.
A PDF version of the full paper should be submitted no later than November 4th, 2015.
Papers under review elsewhere are not acceptable for submission to ARITH 23. By submitting a paper you implicitly confirm you are solely submitting it to ARITH 23.
Authors will be notified of acceptance in February 2016, and final camera-ready papers will be due in March 2016.
Note on paper formatting
The final submissions of accepted papers cannot exceed 8 pages (NO extra pages) using the IEEE Computer Society Conference format (two columns). However, for review, authors may submit a paper with a maximum of 20 pages, 12pt font size, single column and double spacing.