MTV: Microprocessor Test and Verification

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Past:   Proceedings on DBLP

Future:  Post a CFP for 2015 or later   |   Invite the Organizers Email

 
 

All CFPs on WikiCFP

Event When Where Deadline
MTV 2014 15th International Workshop on Microprocessor Test and Verification
Dec 15, 2014 - Dec 17, 2014 Austin, TX, USA Sep 15, 2014
MTV 2012 13th International Workshop on Microprocessor Test and Verification
Dec 10, 2012 - Dec 13, 2012 Austin, TX, USA Sep 1, 2012
MTV 2011 12th International Workshop on Microprocessor Test and Verification
Dec 5, 2011 - Dec 7, 2011 Austin, USA Sep 1, 2011
MTV 2010 International Workshop on Microprocessor Test and Verification
Dec 13, 2010 - Dec 14, 2010 Austin, Texas, USA Sep 15, 2010
 
 

Present CFP : 2014

Overview

The 15th annual workshop on Microprocessor Test and Verification will be held in Austin, TX on Dec 15-17, 2014.
General Chair: Magdy S. Abadir
Program Co-Chair: Jay Bhadra, Freescale Semiconductor
Program Co-Chair: Li-C. Wang, University of California at Santa Barbara
Scope

The purpose of MTV is to bring researchers and practitioners from the fields of verification and test together to exchange innovative ideas and to develop new methodologies to solve the difficult challenges facing us today in various processor and SOC design environments. In the past few years, some work has been done on exploiting techniques from test to solve problems in verification and vice versa. This is the 15th edition of the MTV Workshop, a testament to its success in providing an ideal environment for cross- examination of test and verification experiences and innovative solutions.
Areas of Interest include

Validation of microprocessors and SOCs
Experiences on test and verification of high performance processors and SOCs
Test/verification of multimedia processors and SOCs
Performance testing
High-level test generation for functional verification
Emulation techniques
Silicon debugging
Low Power verification
Formal techniques and their applications
Verification coverage
Test generation at the transistor level
Equivalence checking of custom circuits at the transistor level
ESL Methodology
Virtual Platforms
Software verification
Circuit level verification
Switch-level circuit modeling
Timing verification techniques
Path analysis for verification or test
Design error models
Design error diagnosis
Design for testability or verifiability
SAT for testing and formal verification
Security Verification

 

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