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The 20th International Symposium on Applied Reconfigurable Computing (ARC 2024)
March 20 - 22, 2024, Aveiro, Portugal (https://arc2024.av.it.pt/)
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CALL FOR PAPERS

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Symposium information
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Applied Reconfigurable Computing focuses on the use of reconfigurable hardware,
such as field-programmable gate arrays (FPGAs), to accelerate and optimize
various computational tasks and applications. It involves designing and
implementing hardware configurations that can be dynamically adapted to specific
workloads, improving performance and efficiency in a wide range of applications.
The 20th edition of the symposium aims to bring together researchers and
practitioners of reconfigurable computing with an emphasis on practical
applications of this technology.

The ARC’2024 proceedings will be published as a volume in Springer’s Lecture
Notes in Computer Science (LNCS) series and will also be available through the
SpringerLink online service.

Selected papers will be invited to be submitted for consideration in a special
issue at a publishing venue to be announced shortly (please check the symposium
website).

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Submission Information
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Authors are invited to submit original contributions in English including, but
not limited to, the areas of interest mentioned below. Submission must be up-
loaded to the ARC website and identify the format of the contribution as either

- Long Papers: (12 pages maximum) should include mainly accomplished results
(oral presentation).

- Short Papers: (6 pages maximum) to be composed of work in progress or
reporting recent developments (poster presentation).

The format of the paper should be according to the Springer-Verlag LNCS Series
format rules (see: http://www.springer.com/comp/lncs/authors.html).

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Important Dates
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Submission deadline: 11 December 2023
Decision Notification: 10 January 2024
Author Registration: 30 January 2024
Camera-Ready Paper Submission: 07 February 2024

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Topics of Interest
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Papers in English in all areas of applied reconfigurable computing are invited,
with particular emphasis on:

» Design Methods & Tools
High-level languages & compilation
Simulation & synthesis
Design space exploration

» Applications
Security & cryptography
Embedded computing & DSP
Robotics, space, bioinformatics
Deep learning & neural networks

» Architectures
Computation in/near memory
Self-adaptive, evolvable PSoCs & adaptive SoCs
Low-power designs
Approximate computing
Fine-/coarse-/mixed-grained
Interconnect (NoCs, ...)
Resilient & fault tolerant

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Organizing Committee
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General Chairs: Pedro C. Diniz (Univ. of Porto, Portugal)
Program Chairs:
Iouliia Skliarova (University of Aveiro, Portugal)
Piedad Brox Jiménez (Microelectronics Inst. of Seville, Spain)
Proceedings Chair: Mário Véstias (ISEL, Lisboa, Portugal)

Local Chair: Arnaldo Oliveira (University of Aveiro, Portugal)
Special Issue Chair: Christian Hochberger (TU Darmstadt, Germany)

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