MICRO: International Symposium on Microarchitecture

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Past:   Proceedings on DBLP

Future:  Post a CFP for 2019 or later   |   Invite the Organizers Email

 
 

All CFPs on WikiCFP

Event When Where Deadline
MICRO 2018 The 51st Annual IEEE/ACM International Symposium on Microarchitecture
Oct 20, 2018 - Oct 24, 2018 Fukuoka, Japan Apr 6, 2018 (Mar 30, 2018)
MICRO 2017 The 50th Annual IEEE/ACM International Symposium on Microarchitecture
Oct 14, 2017 - Oct 18, 2017 Boston Apr 4, 2017 (Mar 28, 2017)
MICRO 2016 International Symposium on Microarchitecture
Oct 15, 2016 - Oct 19, 2016 Taiwan, Taipei Apr 10, 2016 (Apr 3, 2016)
MICRO 2015 The 48th International Symposium on Microarchitecture
Dec 5, 2015 - Dec 9, 2015 Waikiki, HI May 22, 2015 (May 15, 2015)
MICRO 2014 The 47th Annual IEEE/ACM International Symposium on Microarchitecture
Dec 13, 2014 - Dec 17, 2014 Cambridge, England May 30, 2014 (May 23, 2014)
MICRO 2013 The 46th Annual IEEE/ACM International Symposium on Microarchitecture
Dec 7, 2013 - Dec 11, 2013 Davis, CA, USA May 31, 2013 (May 24, 2013)
MICRO 2012 International Symposium on Microarchitecture
Dec 1, 2012 - Dec 5, 2012 Vancouver, BC, Canada Jun 8, 2012 (Jun 1, 2012)
MICRO 2011 The 44th Annual IEEE/ACM International Symposium on Microarchitecture, 2011
Dec 3, 2011 - Dec 7, 2011 Porto Alegre, Brazil Jun 1, 2011 (May 25, 2011)
MICRO 2010 The 43rd Annual IEEE/ACM International Symposium on Microarchitecture
Dec 4, 2010 - Dec 8, 2010 Atlanta, GA, USA Jun 11, 2010
MICRO 2009 The 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Dec 12, 2009 - Dec 16, 2009 New York City, USA May 22, 2009 (May 15, 2009)
 
 

Present CFP : 2018

The 51st International Symposium on Microarchitecture is the premier forum for presenting, discussing, and debating innovative microarchitecture ideas and techniques for advanced computing and communication systems. This symposium brings together researchers in fields related to microarchitecture, compilers, chips, and systems for technical exchange on traditional microarchitecture topics and emerging research areas. The MICRO community has enjoyed a close interaction between academic researchers and industrial designers and we aim to continue this tradition at MICRO-51. In 2018, MICRO goes to Fukuoka, Japan.

We invite original paper submissions related to (but not limited to) the following topics:

Processor, memory, interconnect, and storage architectures.
Microarchitecture and compiler techniques for optimizing the memory hierarchy, analysis of new memory hierarchies, emerging architectures based on new memory technologies.
Hardware, software, and hybrid techniques for improving system performance, energy-efficiency, cost, complexity, predictability, quality of service, reliability, dependability, security, scalability, programmer productivity, etc.
Architectures for instruction-level, thread-level, and memory-level parallelism: superscalar, VLIW, data-parallel, multithreaded, multicore, many-core, etc.
Architectures for emerging application domains such as deep learning, machine learning, relational computation, neuromorphic, quantum, etc.
Accelerator designs and heterogeneous architectures including system-on-chip architectures, application specific fixed function, programmable, near-data and in-memory accelerators, etc.
Compiler and microarchitectural techniques for parallelism (ILP, TLP, MLP).
Compiler optimizations and microarchitecture techniques for heterogeneous architectures including CPU+GPUs, GPUs, SoCs, and programmable accelerators.
Microarchitecture techniques to better support system software, programming languages, programmability, and compilation.
Architectures and compilers for embedded processors, DSPs, GPUs, ASIPs (network processors, multimedia, wireless, etc.).
Low-power, high-performance, and cost/complexity-efficient architectures.
Architectures for emerging embedded platforms, including smartphones, automotive, server/cloud, etc.
Advanced software/hardware speculation and prediction schemes.
Microarchitecture modeling and simulation methodology.
Insightful experimental and comparative evaluation and analysis of existing microarchitectures, hardware/software mechanisms and workloads.

Submissions should follow the guidelines and formatting rules specified on the conference website. Papers that violate these guidelines and rules may be returned to author(s) without review.
 

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