HOTI: High Performance Interconnects



Past:   Proceedings on DBLP

Future:  Post a CFP for 2021 or later   |   Invite the Organizers Email


All CFPs on WikiCFP

Event When Where Deadline
HOTI 2020 27th International Symposium on High Performance Interconnects 2020
Aug 19, 2020 - Aug 20, 2020 San Jose, CA May 15, 2020 (May 8, 2020)
HotI 2016 24th International Symposium on High Performance Interconnects
Aug 24, 2016 - Aug 26, 2006 Santa Clara, CA, USA May 11, 2016 (May 4, 2016)
HOTI 2014 22nd IEEE Hot Interconnects
Aug 22, 2014 - Aug 24, 2014 Silicon Valley, CA TBD
HOTI 2012 The 20th Annual IEEE Symposium on High Performance Interconnects
Aug 22, 2012 - Aug 24, 2012 Santa Clara, CA May 13, 2012
HOTI 2011 IEEE 19th Annual Symposium on High-Performance Interconnects
Aug 24, 2011 - Aug 26, 2011 Santa Clara, USA Apr 30, 2011

Present CFP : 2020

27th International Symposium on High Performance Interconnects 2020
QCT, San Jose, California, August 19-21, 2020

Safety and Well-Being
Hot Interconnects is scheduled to be held as planned, beginning on August 19.
Given the uncertainty re the Coronavirus, we are planning for an online
conference but we are also holding open the possibility of a physical
conference. The safety and well-being of all conference participants is our
priority. We will continue to monitor official travel advisories related to the
Coronavirus and update the event website to keep you informed. We encourage
you to review the conference’s “Travel and Safety Information” page for tips
and travel recommendations. If you have any questions or need additional
information, please email us for further details:

As well as a Travel and Safety Information page with these links:

World Health Organization:
Centers for Disease Control:
European Center for Disease Control:
National Health Commission of the People’s Republic of China:

Submission Schedule:

* Paper abstract deadline: May 8th, 2020
* Submission deadline: May 15th, 2020
* Notification of acceptance: June 19th, 2020

Selected papers from Last year's Hot Interconnects have been published in
the Hot Interconnects dedicated January/February issue of IEEE Micro:

Hot Interconnects is the premier international forum for researchers and
developers of state-of-the-art hardware and software architectures and
implementations for interconnection networks of all scales, ranging from
multi-core on-chip interconnects to those within systems, clusters, data
centers, and clouds. This yearly conference is attended by leaders in
industry and academia. The atmosphere provides for a wealth of
opportunities to interact with individuals at the forefront of this field.

Themes include cross-cutting issues spanning computer systems, networking
technologies, and communication protocols for high-performance
interconnection networks. This conference is directed particularly at new
and exciting technology and product innovations in these areas.
Contributions should focus on real experimental systems, prototypes, or
leading-edge products and their performance evaluation. In past year’s the
best papers on interconnect microarchitecture have been invited to submit
extended versions of their papers to special journal editions, we are
pursuing this once again this year.

Building on last year's successful technical program comprising keynotes,
technical sessions, and panels on networking for datacenters and
edge computing, the 2020 edition of Hot Interconnects is
generously hosted by QCT at their campus in San Jose, CA.

This year's conference focuses on SmartNICs and their adoption and
use in traditional and non-traditional applications, such as
Cloud computing. We hope you can join us there.

We invite paper submissions across a wide range of topics and levels,
ranging from fundamentals to the latest advances in hot topic areas.

Topics of interest include, but are not limited to:

* Novel and innovative interconnect architectures
* Multi-core processor interconnects
* System-on-Chip Interconnects
* Advanced chip-to-chip communication technologies
* Optical interconnects Protocol and interfaces for inter-processor
* Survivability and fault-tolerance of inter-connects
* High-speed packet processing engines and network processors
* Systems software for communication
* System and storage area network architectures and protocols
* High-performance host-network interface architectures
* High-bandwidth and low-latency I/O
* Pb/s switching and routing technologies
* Innovative architectures for supporting collective communication
* Novel communication architectures to support cloud & grid computing
* Centralized and distributed cloud interconnects
* Requirements driving high-performance interconnects
* Traffic characterization for HPC systems and commercial data centers
* Software-defined networking and software overlay networks
* Software for network bring-up, configuration and performance management
(OpenFlow, OpenSM)
* Data Center Networking


* Paper abstract deadline: May 8th, 2020
* Submission deadline: May 15th, 2020
* Notification of acceptance: June 19th, 2020
* Symposium: August 19-20, 2020
* Tutorials: August 21, 2020

This year we invite papers to be submitted either as regular, long papers
(6-8 pages) or as hot topic papers (3-4 pages). Hot topic papers could be
positional papers, industry papers, or papers describing hot-off-the-press
breaking research results, and will judged accordingly and independently
from the regular long papers.

* Papers need sufficient technical detail to judge quality and
suitability for presentation.
* Submissions should include title, author, abstract, and paper in
double-column, IEEE format.
* Long paper limit: 8 pages, single-spaced, 2 columns.
* Hot topic paper limit: 4 pages, single-spaced, 2 columns.
* Papers should be submitted electronically through EasyChair at

* Paper title and abstract should be submitted by May 8th.
* Full paper manuscript should be submitted by May 15th.
* Accepted papers (both long and hot topic papers) will be published
in proceedings by the IEEE Computer Society.


We are also inviting poster abstract submissions. Abstracts will consist
of a one page description of the proposed poster and should highlight
technical merit, relevance to HotI, and novelty of the content. Additionally,
abstracts should include title and author information. Selected
submissions will be invited to present their work in poster format during
the poster session. Posters should be 32x40 inches (or 80x100cm) with a
vertical/portrait layout.


* Early poster abstract deadline: June 8th, 2020
* Early poster notification of acceptance: June 15th, 2020
* Final poster abstract deadline: July 13th, 2020
* Final poster notification of acceptance: July 20th, 2020

To submit, go to

Sponsor Hot Interconnects! Email the Sponsorship chair, Raj Channa


Send questions relating to the conference operation to:


Khaled Hamidouche, AMD
Don Draper, ProPrincipia International Associates


Send questions relating to the program to


Manjunath Gorentla Venkata, Mellanox Technologies, Inc
Ryan E. Grant, Sandia National Laboratories


Sponsored by the IEEE Computer Society Technical Committee for
Microprocessors and Microcomputers

Sister conferences:

Go to the Hot Interconnects web site for updates:

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