HOST: Hardware-Oriented Security and Trust



Past:   Proceedings on DBLP

Future:  Post a CFP for 2018 or later   |   Invite the Organizers Email


All CFPs on WikiCFP

Event When Where Deadline
HOST 2017 CFP for the IEEE International Symposium on Hardware Oriented Security and Trust (HOST 2017)
May 1, 2017 - May 5, 2017 McLean, VA, USA Nov 1, 2016
HOST 2016 IEEE International Symposium on Hardware Oriented Security and Trust
May 3, 2016 - May 5, 2016 McLean, VA, USA Nov 12, 2015 (Nov 8, 2015)
HOST 2015 IEEE Int. Symposium on Hardware-Oriented Security and Trust
May 5, 2015 - May 7, 2015 Washington DC Metropolitan Area Oct 31, 2014 (Oct 24, 2014)
HOST 2012 IEEE Int. Symposium on Hardware-Oriented Security and Trust
Jun 3, 2012 - Jun 4, 2012 San Francisco Jan 20, 2012
HOST 2011 IEEE Int. Symposium on Hardware-Oriented Security and Trust
Jun 5, 2011 - Jun 6, 2011 San Diego Jan 19, 2011
HOST 2010 IEEE International Symposium on Hardware-Oriented Security and Trust
Jun 13, 2010 - Jun 14, 2010 Anaheim, CA Mar 26, 2010
HOST 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
Jun 9, 2008 - Jun 9, 2008 Anaheim, CA, USA Apr 18, 2008

Present CFP : 2017

IEEE International Symposium on Hardware Oriented Security and Trust (HOST) aims to facilitate the rapid growth of hardware-based security research and development. HOST highlights new results in the area of hardware and system security. Relevant research topics include techniques, tools, design/test methods, architectures, circuits, and applications of secure hardware. HOST 2017 invites original contributions related to, but not limited by, the following topics.
Hardware Trojan attacks and detection techniques
Hardware techniques to facilitate software and/or system security
Hardware-based security primitives (PUFs, RNGs)
System-on-chip (SoC) security
Side-channel attacks and protection
Security, privacy, and trust protocols
Metrics, policies, and standards related to hardware security
Hardware IP trust (watermarking, metering, trust verification)
Trusted manufacturing including split manufacturing and 3D ICs
Security analysis and protection of Internet of Things (IoT)
Secure and efficient implementation of crypto algorithms
Reverse engineering and hardware obfuscation
Supply chain risks mitigation (e.g., counterfeit detection & avoidance)
Hardware tampering attacks and protection
Applications of hardware security to secure system development
You can register and submit your paper at: The page limit is 6 pages, double column, IEEE format, with a minimum font size of 10 points. Submissions are anonymous and must not identify the authors, directly or indirectly, anywhere in the manuscript.

For Students:
Students can participate in a hardware demo session by submitting a 1-page proposal describing the research and features to be demonstrated on an FPGA or other hardware platform. Please upload your proposal to EasyChair by March 15, 2017.
A best paper award will be given to paper whose first author is a full-time student.
A best presentation award will be given to a speaker who is a full-time student.
Travel grants are available for graduate and undergraduate students.

Registration of Title + Abstract: November 1, 2016
Submission of Paper: November 8, 2016
Notification of Acceptance: January 31, 2017
Camera-ready Version: February 28, 2017
Hardware Demo Proposal: March 15, 2017

Conference Website:
Facebook Page:

Technical Program: Ryan Kastner
University of California, San Diego
Tel: +1 (858)534-8908

General Information: Swarup. Bhunia
University of Florida
Tel: +1 (352) 392-5989

Related Resources

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