GLSVLSI: Great Lakes Symposium on VLSI

FacebookTwitterLinkedInGoogle

 

Past:   Proceedings on DBLP

Future:  Post a CFP for 2018 or later   |   Invite the Organizers Email

 
 

All CFPs on WikiCFP

Event When Where Deadline
GLSVLSI 2017 GLSVLSI 2017
May 10, 2017 - May 12, 2017 Banff, Alberta, Canada Dec 12, 2016
GLSVLSI 2016 IEEE GLSVLSI
May 18, 2016 - May 20, 2016 Boston, MA, USA Dec 21, 2015
GLSVLSI 2014 Great Lakes Symposium on VLSI Systems
May 21, 2014 - May 23, 2014 Houston, Texas, USA Dec 2, 2013
GLSVLSI 2013 Great Lakes Symposium on VLSI 2013
May 2, 2013 - May 4, 2013 Paris, France Dec 15, 2012
GLSVLSI 2011 Great Lakes Symposium on VLSI 2011
May 2, 2011 - May 4, 2011 Lausanne, Switzerland Dec 5, 2010
GLSVLSI 2010 20th Great Lakes Symposium on VLSI 2010
May 9, 2010 - May 9, 2010 Providence, RI, USA Dec 7, 2009
GLSVLSI 2009 Great Lakes Symposium on VLSI 2009
May 10, 2009 - May 12, 2009 Boston, MA, USA Nov 30, 2008
GLSVLSI 2008 Great Lakes Symposium on VLSI 2008
May 4, 2008 - May 6, 2008 Orlando, FL, USA Nov 30, 2007
 
 

Present CFP : 2017

GLSVLSI 2017

Banff, Alberta, Canada, May 10-12, 2017

http://www.glsvlsi.org/

Sponsored by ACM SIGDA

The 27th edition of GLSVLSI will be held in the beautiful Canadian Rockies. Original, unpublished papers describing research in the general areas of VLSI and hardware design are solicited. Please visit http://www.glsvlsi.org/ for more information. In addition to the traditional topic areas of GLSVLSI listed below, papers are solicited for a special theme of “Green Technologies for Computing and IoT Applications.”

Important Deadlines:

Paper submission deadline:
December 12, 2016

Acceptance Notification:
February 13, 2017

Camera-Ready Paper Due:
March 13, 2017

Program Tracks:


VLSI Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, analog/digital/mixed-signal systems, NoC, SoC, IoT, interconnects, memories.
VLSI Circuits and Power Aware Design: analog/digital/mixed-signal circuits, RF and communication circuits, chaos/neural/fuzzy-logic circuits, high-speed/low-power circuits, temperature estimation/optimization, power estimation/optimization.
Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis.
Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static and dynamic defect- and fault-recoverability, variation-aware design.
Emerging Computing & Post-CMOS Technologies: nanotechnology, molecular and quantum computing, approximate and stochastic computing, sensor and sensor networks, post CMOS VLSI.
Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, hardware Trojan, side-channel analysis, CPS and IoT
Biochips and Biological Systems: bio-inspired and neuromorphic circuits and systems, BioMEMs, lab-on-a-chip, biosensors, hardware and software solutions for medical diagnostics, CAD tools for biology and biomedical systems, implantable and wearable devices, systems and synthetic biology.

Paper Submission: Authors are invited to submit full-length (6 pages maximum), original, unpublished papers along with an abstract of at most 200 words. To enable blind review, the author list should be omitted from the main document. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. Electronic submission in PDF format to the http://www.glsvlsi.org website is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process.

Paper Format: Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at: http://www.acm.org/sigs/pubs/proceed/template.html and the classification system detailed at: http://www.acm.org/class/1998

Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentation at the symposium. Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the symposium and present the paper.

 

Related Resources

GLSVLSI 2016   IEEE GLSVLSI