FPL: Field-Programmable Logic and Applications

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Past:   Proceedings on DBLP

Future:  Post a CFP for 2017 or later   |   Invite the Organizers Email

 
 

All CFPs on WikiCFP

Event When Where Deadline
FPL 2016 26th International Conference on Field-Programmable Logic and Applications
Aug 29, 2016 - Sep 2, 2016 Lausanne, Switzerland Mar 27, 2016 (Mar 20, 2016)
FPL 2015 International Conference on Field-programmable Logic and Applications
Sep 2, 2015 - Sep 4, 2015 London, United Kingdom Apr 3, 2015 (Mar 27, 2015)
FPL 2014 24th International Conference on Field Programmable Logic and Applications
Sep 2, 2014 - Sep 4, 2014 Munich, Germany Mar 28, 2014
FPL 2013 23rd international conference on field programmable logic and applications
Sep 2, 2013 - Sep 4, 2013 Porto, Portugal Mar 22, 2013
FPL 2012 International Conference on Field Programmable Logic and Applications
Aug 29, 2012 - Aug 31, 2012 the University of Oslo, Norway Mar 31, 2012
FPL 2011 International Conference on Field Programmable Logic and Applications
Sep 5, 2011 - Sep 7, 2011 Chania, Crete, Greece Mar 18, 2011
FPL 2010 2010 International Conference on Field Programmable Logic and Applications (FPL)
Aug 31, 2010 - Sep 2, 2010 Milan, Italy Mar 19, 2010
FPL 2009 International Conference on Field Programmable Logic and Applications
Aug 31, 2009 - Sep 2, 2009 Prague Mar 16, 2009
FPL 2008 International Conference on Field Programmable Logic and Applications
Sep 8, 2008 - Sep 10, 2008 Heidelberg, Germany Mar 16, 2008
 
 

Present CFP : 2016

The International Conference on Field-Programmable Logic and
Applications (FPL) was the first and remains the largest conference
covering the rapidly growing area of field-programmable logic and
reconfigurable computing. During the past 25 years, many of the
advances in reconfigurable system architectures, applications,
embedded processors, design automation methods and tools were first
published in the proceedings of the FPL conference series. The
conference objective is to bring together researchers and
practitioners from both academia and industry and from around the
world. FPL 2016 looks for contributions in the following areas:

Architectures and Technology
* FPGAs, GPUs and DSPs
* Heterogeneous datacentre/embedded computing
* Low power architectures
* Fault tolerant architectures
* Security and cryptography for FPGA Design
* 2.5D and 3D architectures
* Advanced on-chip interconnect technologies
* Analog and mixed-signal arrays
* Emerging technologies

Applications and Benchmarks
* Aerospace, automotive and industry automation
* Bioinformatics & medical systems
* Communications, software defined networking and Internet-of-Things
* Finance, HPC and database acceleration
* Big data analytics
* Embedded & cyber physical systems
* Signal processing and SDR
* Benchmarks for FPGA designs

Design Methods and Tools
* System-level design tools
* High-level synthesis
* Hardware / software co-design
* Logic optimization and technology mapping
* Optimizations for power efficiency
* Packing, placement and routing
* Rapid prototyping and emulation
* Testing, debugging and verification
* Open-source tools

Self-aware and Adaptive Systems
* Self-awareness in FPGA-based systems
* Self-adaptive architectures and design techniques
* Virtualization of reconfigurable hardware
* Runtime resource management
* Partial reconfiguration

Surveys, Trends, and Education
* Surveys on reconfigurable logic architectures and design techniques
* Deployment of FPGAs in new application domains
* Roadmap of reconfigurable computing platforms
* Teaching courses and tutorials

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ABSTRACT SUBMISSION DEADLINE:
20th March 2016

PAPER SUBMISSION DEADLINE:
27th March 2016 (please note: no extensions!)

DEMO NIGHT, PHD FORUM, WORKSHOPS, AND TUTORIALS SUBMISSION DEADLINE:
8th May 2016

NOTIFICATIONS:
Around 15th June 2016

FINAL MANUSCRIPTS DEADLINE:
4th July 2016

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ORGANIZING COMMITTEE

General Chairs
Paolo Ienne, EPFL, CH
Walid Najjar, University of California Riverside, US

Programme Chairs
Jason Anderson, University of Toronto, CA
Philip Brisk, University of California Riverside, US

Workshop and Tutorial Chairs
Pierre-Emmanuel Gaillardon, University of Utah, US
Michael Huebner, University of Bochum, DE

PhD Forum and Demo Night Chairs
Mirjana Stojilovic, HEIG-VD, CH
Yann Thoma, HEIG-VD, CH

Proceedings Chair
Walter Stechele, TU München, DE

Publicity Chair
Kubilay Atasu, IBM ZRL, CH

Local Arrangements Chair
Chantal Schneeberger, EPFL, CH

Registration Chair
Andrew J. Becker, EPFL, CH

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STEERING COMMITTEE

Jürgen Becker, KIT Karlsruhe, DE
Koen Bertels, TU Delft, NL
Eduardo Boemo, Univ. Autónoma de Madrid, ES
João M. P. Cardoso, Universidade do Porto, PT
Peter Y. K. Cheung, Imperial College London, UK
Martin Danek, Daiteq, CZ
Apostolos Dollas, TU of Crete, GR
Fabrizio Ferrandi, Politecnico di Milano, IT
Manfred Glesner, TU Darmstadt, DE
John Gray, Consultant, UK
Reiner Hartenstein, TU Kaiserslautern, DE
Andreas Herkersdorf, TU München, DE
Udo Kebschull, Goethe University Frankfurt, DE
Wayne Luk, Imperial College London, UK
Patrick Lysaght, Xilinx, Inc., US
Jari Nurmi, Tampere University of Technology, FI
Lionel Torres, University of Montpellier II, FR
Jim Tørresen, University of Oslo, NO
 

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